ZedBoard + Pmod CAN error in project

[jackn]

Hi, I have a zedboard with a Pmod CAN of digilent.

The block vivado Pmod is developed by digilent.

My scheme, the constraints of Pmod CAN-Pmod JA are attached.

But I have these problems:

CRITICAL WARNING: [BD 41-52] Could not find the abstraction definition specified by the vlnv: digilentinc.com:interface:pmod_rtl:1.0

CRITICAL WARNING: [BD 41-181] Type specified by the VLNV: 'digilentinc.com:interface:pmod_rtl:1.0', cannot be found. Interface port: 'Pmod_out' cannot be created WARNING: [IP_Flow 19-3571] IP 'design_1_PmodCAN_0_0' is restricted: * IP definition 'PmodCAN_v1_0 (1.0)' relies on the following subcore(s) that were not found in the IP Catalog: digilentinc.com:ip:pmod_bridge:1.0 Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.

CRITICAL WARNING: [BD 41-51] Could not find bus definition for the interface: Pmod_out

CRITICAL WARNING: [BD 41-49] Could not find abstraction definition for the interface: Pmod_out

CRITICAL WARNING: [BD 41-49] Could not find abstraction definition for the interface: Pmod_out create_bd_cell: Time (s): cpu = 00:00:04 ; elapsed = 00:00:06 . Memory (MB): peak = 396.426 ; gain = 134.703 INFO: [PS7-6] Configuring Board Preset part0. Please wait ...... INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI WARNING: [BD 5-233] No interface ports matched 'get_bd_intf_ports Pmod_out'

ERROR: [BD 5-106] Arguments to the connect_bd_intf_net command cannot be empty. ERROR: [Common 17-39] 'connect_bd_intf_net' failed due to earlier errors.

 

Thank you

 

[jackn]

can you help me? thanks thanks thanks

[artvvb]

Hi @jackn,

Apologies for the slow response. I have a few questions:

What version of Vivado are you using?

Are you using Avnet's board files for the Zedboard? In order to use the Pmod CAN IP core, you will need to use our board files. Installation instructions can be found on our wiki, at this link.

How did you add the Pmod CAN IP core to your project? Did you follow this tutorial? If so, which release did you download? It is somewhat strange that Vivado can find the Pmod CAN IP core, but cannot find the Pmod interface (located in the if/ subdirectory of the release). These errors could be caused by adding only the ip/ subdirectory of vivado-library to your project, rather than the vivado-library/ directory itself. Since the pmod bridge IP (another required dependency of the CAN IP) also was not found, I'd guess that you added only the Pmod CAN itself to Vivado's IP repositories page in the Settings GUI.

If you are using our board files and the vivado-library, you should not need to manually constrain the Pmod_out interface's ports. Vivado IPI will do this for you.

Thanks,

Arthur

 

[jackn]

1) I'm using Vivado 2016.4, as said in this topic (https://reference.digilentinc.com/learn/programmable-logic/tutorials/pmod-ips/start).

2) I haven't done the points 2-3 of the guide (https://reference.digilentinc.com/vivado/installing-vivado/start#installing_digilent_board_files), but i have created the project, and I imported in setting/IP/Reposity Manager the block ip, downloaded here: https://github.com/Digilent/vivado-library/releases

3) You see in point 3. In the images there are the directory. It is correct?

P.S. Now i cannot try the points 2-3, because now i haven't zedboard. I can follow the guide monday, but you could give me a feedback, because I have short time of project.

Thank Thank you.

 

 

[jackn]

Quote

@artvvb

I have completed the point 3, but it not work.

[jackn]

I have reduced the  warnings and errors:

 

create_bd_cell: Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 406.785 ; gain = 133.367 INFO: [PS7-6] Configuring Board Preset part0. Please wait ......

INFO: [Ipptcl 7-1463] No Compatible Board Interface found. Board Tab not created in customize GUI Wrote : <C:/Users/gcanc/Desktop/ZedBoardAeromechs/hdl_prj/vivado_ip_prj/vivado_prj.srcs/sources_1/bd/design_1/design_1.bd> Wrote : <C:/Users/gcanc/Desktop/ZedBoardAeromechs/hdl_prj/vivado_ip_prj/vivado_prj.srcs/sources_1/bd/design_1/ui/bd_1f5defd0.ui> # check_ip_cache -use_cache_location ipcache # update_ip_catalog

WARNING: [Vivado 12-818] No files matched 'system_top.bd' # set_property synth_checkpoint_mode Hierarchical [get_files system_top.bd]

ERROR: [Common 17-55] 'set_property' expects at least one object. Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.

INFO: [Common 17-206] Exiting Vivado at Mon Jun 18 17:45:09 2018...

and now? ?

[artvvb]

It looks like you have vivado-library included correctly.

For vivado-boards, please go to Settings -> Project Settings -> General -> Project Device. "Zedboard" should show up in this field. Click the "...", when the "Select Device" wizard shows up, it should have the Zedboard selected. Could you confirm that the "vendor" column shows "digilentinc.com", not "em.avnet.com". If it shows avnet, select the digilent version instead, if the digilent version doesn't show up at all, please refer to the link in my previous comment. I suspect that you installed the digilent board files, but did not update the board file being used in your project.

Thanks,

Arthur

[jpeyron]

Hi @jackn,

To add to @artvvb's post . ere is a project made in Vivado 2016.4 for the zedboard as well as the pmod Can on JA. The ext_spi_clk is given a 50 MHZ clock. I have attached screen shots as well.

thank you,

Jon

[jackn]

11 hours ago, artvvb said:

It looks like you have vivado-library included correctly.

For vivado-boards, please go to Settings -> Project Settings -> General -> Project Device. "Zedboard" should show up in this field. Click the "...", when the "Select Device" wizard shows up, it should have the Zedboard selected. Could you confirm that the "vendor" column shows "digilentinc.com", not "em.avnet.com". If it shows avnet, select the digilent version instead, if the digilent version doesn't show up at all, please refer to the link in my previous comment. I suspect that you installed the digilent board files, but did not update the board file being used in your project.

Thanks,

Arthur

@artvvbok, i solve it. Indeed I have moved the hardware in Simulink/Model Reference as a new hardware. This process must include the library of digilent, and i wronged it. Thanks.

[jackn]

11 hours ago, jpeyron said:

Hi @jackn,

To add to @artvvb's post . ere is a project made in Vivado 2016.4 for the zedboard as well as the pmod Can on JA. The ext_spi_clk is given a 50 MHZ clock. I have attached screen shots as well.

thank you,

Jon

@jpeyronI have some questions. Indeed I have moved the hardware in Simulink/Model Reference as a new hardware.

1)I haven't spi_interrupt and gpio_interrupt. Are they necessary?  How can i add?

2)  Do You have to connect these interrupts?

3) Why do you add in your scheme the clocking wizard?

[jpeyron]

Hi @jackn,

You do not have to have to use the interrupts. The demos we have do not use the interrupts.  To add the interrupt you would click into the zynq processor as shown in the screen shot attached. You would use a concat block to connect the two different interrupts. Something similar to the screen shot. Iam not using the clocking wizard but rather the clock in the zynq processor. 

thank you,

Jon

[jackn]

I have another problem in implementation step in vivado.

all constraints give me a critical warnings on all pins of pmod (constraints file):

'set_property' expects at least one object 

[jpeyron]

Hi @jackn,

You are constraining  pins in your xdc that are not in your block design. Please attach a screen shot of your block design along with your wrapper and xdc file.

thank you,

Jon