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bdina77

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Topics posted by bdina77

  1.  

    Question: Xilinx IP core USB2.0 Constraints

    By bdina77, in FPGA

    • Awaiting best answer
    • 0 votes
    • 1 answer
  2.  

    Question: increasing latancy with lwip

    By bdina77, in FPGA

    • Awaiting best answer
    • 0 votes
    • 8 answers
  3.  

    Question: MicroBlaze Soft reset

    By bdina77, in FPGA

    • Awaiting best answer
    • 0 votes
    • 1 answer
  4.  

    Question: WatchDog timer on Microblaze

    By bdina77, in FPGA

    • Awaiting best answer
    • 0 votes
    • 4 answers
  5.  

    Question: GPIO[41:26]

    By bdina77, in FPGA

    • Awaiting best answer
    • 0 votes
    • 6 answers
  6.  

    Question: booting from Quad Spi after hard reset

    By bdina77, in FPGA

    • Awaiting best answer
    • 0 votes
    • 8 answers
  7.  

    Question: Vivado SDK generate linker scripts

    By bdina77, in FPGA

    • Awaiting best answer
    • 0 votes
    • 7 answers
  8.  

    Question: SDK flash tutorial

    By bdina77, in FPGA

    • Awaiting best answer
    • 0 votes
    • 3 answers
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