salamus

Thanks for the reply! So, declarations are: /---------------------------------------------------------------/ localparam IDLE = 0; localparam byte1 = 1; localparam byte2 = 2; localparam byte3 = 3; reg [2:0] state; reg [7:0] data_store; wire ready2; wire data_in; assign ready2 = ready_2; // ready2 is a wire connected to the input of uart_tx, a signal to start working with incoming byte assign data_in = data_store; // data_in is a wire connected to the data input of uart_tx. //------ module uart_tx instantiation-------// RS_232_OUT RS_232_OUT ( .clk(clk), .data(data_in), .busy(busy), .ready(ready2), .data_out(DATA_OUT_232), .done(done) ); =================================== Also, certainly will try to follow this advice as soon as possible

Hi everyone! I am trying to write a fsm, that sends 3 bytes to uart transmitter, so that transmitter can send it to PC. I did this task with one byte, however 3 bytes pose a difficult task for me. here is my fsm code: // fsm has 4 states. When 'reset' is high, fsm should transfer from IDLE state to state byte1. After that, // check the 'busy' signal, that comes from uart tx. Busy is high when uart tx module is in the process of sending data/ // ready_2 signal is a signal, that tells uart tx to lock the incoming data reset in my case is a signal from uart receiver, that asserts 1, when i send one byte from PC to to fpga via UART receiver. Basically, it is a signal, that tells us, that uart receiver finished receiving byte from pc. ============================================================ always @(posedge clk) begin if (!reset) begin state <= IDLE; ready_2 <= 1'b0; // signal for UART transmitter to start sending data data_store<= 1'b0; // register for 8-bit data end else case (state) IDLE: begin if (reset) state<=byte1; else state<=IDLE; end byte1: begin ready_2<=1'b0; if (~busy) begin ready_2<=1'b1; data_store<=8'b00110101; state<=byte2; end else state<=byte1; end byte2: begin ready_2<=1'b0; if (~busy) begin ready_2<=1'b1; data_store<=8'b10101010; state<=byte3; end else state<=byte2; end byte3: begin ready_2<=1'b0; if (~busy) begin ready_2<=1'b1; data_store<=8'b01110111; state<=IDLE; end else state<=byte3; end endcase end ============================================================== Code for UART tx is taken from here https://nandland.com/uart-serial-port-module/ and works just fine. Can anyone, please, tell me, what am i doing wrong with fsm? I tried various methods, but the best i accomplished was to send one first byte