Yatharth Gupta

Hey JColvin, Thank you for your reply. I'm currently working on migrating an open-source RISC-V SoC project from the Arty A7-100T board to the Arty Z7-10 board. However, I've hit a roadblock in the process. I need a mig.prj file tailored to the Arty Z7-10 board, to work with the tool chain. I'm currently facing difficulty when it comes to assigning register bank 504 to the DDR3 memory within the Memory Interface Generator IP block. Could you provide me with guidance on detailed process or an alternative approach for generating the 'mig.prj' file specific to the Arty Z7 board? Thanks and regards, Yatharth Gupta

Hi all, For an ongoing project I need the mig.prj file for the diligent arty-z7-10 board. On referring the following link I could not find the same under the required folder. https://github.com/Digilent/vivado-boards Is there any common file that can be used for the same? Thank you for your time. Regards, Yatharth Gupta