Hi,
I am a beginner in FPGA. I am trying to make a counter for digital pulses with its time tagged data(Arty Z7-20 board, 100 MBps data transfer expected). For a start I have made a simple frequency counter HDL code which counts the pulses from signal.
Now I want to send the frequency_out data to PC via ethernet PHY. I understand that I need to connect my PL to PS and make a software and server. But really can't understand how to? Can anyone recommend good recourses that can guide me to accomplish this.
I have attached below the VHDL code which works fine. I have tried to make a block design.