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JML

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Everything posted by JML

  1. I have spent the last four days obsessing on this problem and here is the best oslution I've been able to achieve. As showed before in this thread, the official tutorial still don't work for the Nexys A7-100T (https://digilent.com/reference/programmable-logic/guides/getting-started-with-ipi). My goal is to gain access to the DDR2 memory on the Nexys A7 board from Microblaze. I got the exact same results as @Brenden. I tried to follow his suggestion that require to create a 200MHz clock for the MIG input clk_ref_i. Using trial and error, I got the ""ideal" clock generator location that got me the least critical warning. I tested a program run in the Microblaze soft core to test read/write to the DDR2 memory and everything was fine. I still need to do a lot more test and include other IP I need for my project. I attached to the post a PDF cainting the steps I used. (I would like to include my Vivado files, but I have size limitations that prevent me to do so). I would appreciate any feedback or help that would get rid of these critical warnings (all TIMING-6, see attached doc for more details). Maybe they can be fixed easliy, but I don't know how. I hope that all this could help to produce a functionning tutorial for the Nexys A7. Thanks! Nexys-A7100T_DDR2_Microblaze_Procedure.pdf
  2. I currently have the same exact problem with my Nexys A7 100T (wen through the tutorial twice and got the same critical warnings). I read through the replies and I don't quite understand what is the solution to the problem. Any help would be appreciated. Thanks!
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