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zzzhhh

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  1. It seems that it is recommended to use Arty A7 board to embed a soft RISC-V CPU core (link), and load Linux into it. But BASYS 3 and Arty A7 have the same Xilinx Artix-7 FPGA (model: XC7A35T). So, is it possible to embed a RISC-V CPU into BASYS 3? Is there any technical difficulty (like very slow, etc.) that we must use Arty A7 or more advanced board? Many thanks for your advice.
  2. Assume there is a file in host Windows 10 PC which contains only a byte. A Basys 3 Artix-7 FPGA Developer Board is connected to the host through a micro-USB cable. I would like to program FPGA so that it can read the byte in the file in host (since micro-USB cable is the only connection between host and Basys 3, FPGA will read through this micro-USB cable), and then display its value in decimal form on LED. Is there any way to do it? I know Verilog has system task functions for file I/O, but not sure if they are applicable in this scenario. Thanks for your help.
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