Jonathan101

Hello everyone, I am using Arty7-35T for a project that once used to work. I have compiled workspace, and I load bitstream from Vitis. When Vitis program the FPGA and try to load the program an error comes: ERROR : Cannot stop MicroBlaze. Stalled on instruction fetch. PC=0x58 This is full Vitis log: Vitis Log: 11:55:58 INFO : ----------------XSDB Script---------------- connect -url tcp:127.0.0.1:3121 targets -set -filter {jtag_cable_name =~ "Digilent Arty A7-35T 210319B57F72A" && level==0 && jtag_device_ctx=="jsn-Arty A7-35T-210319B57F72A-0362d093-0"} fpga -file /workspace/Code_Package/Code_Sample/_ide/bitstream/design_1_wrapper.bit targets -set -nocase -filter {name =~ "*microblaze*#0" && bscan=="USER2" } loadhw -hw /workspace/Code_Package/design_1_wrapper/export/design_1_wrapper/hw/design_1_wrapper.xsa -regs configparams mdm-detect-bscan-mask 2 targets -set -nocase -filter {name =~ "*microblaze*#0" && bscan=="USER2" } dow /workspace/Code_Package/Code_Sample/Debug/Code_Sample.elf ----------------End of Script---------------- 11:55:58 ERROR : Cannot stop MicroBlaze. Stalled on instruction fetch. PC=0x58 What can I do to solve this issue?

Hello support. Does petalinux FTDI drivers exist for USB master on this board? I want to connect from this processor (zynq 7000) to a slave board with FTDI chip Thanks is advance.

Hi support. I built a design in Vivado that consists of microblaze [Arty-A7 35T] . Due to the fact that I have very large workspace [.cpp, .h files], i add also ddr [MIG] to the design, with configurations as default. However, after I export the .xsa to Vitis and build my workspace, I got unusual errors: -getchar() isn't working -variables that suddenly change their value without meaning -after main() ends, it start from the beginning i suspect all of this is related to memory. i configure in lscript.ld file on Vitis heap and stack to be 0x2000 Is there application note that explain how to implement mig with microblaze in this board? I attach the relevant part of the block design and address map.