Hi @artvvb!, has this fix been added to any release of the board file? I am having the same error with the 1.3 version of the board files and Vivado 2021.2. Thanks!
Edit: OK, I have seen that the MIG accepts now a the 100MHz clock. Since the speed of the memory is 400 Mhz, then the ui_clk output is 400Mhz / 4 = 100Mhz. In your design, you have added an extra clocking wizard to feed the clock inputs of the Microblaze, for what reason? it isn't like connect two MCMM in series? Is related to a change of clock region?
Thanks!