D@n
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@hirayaku, It looks like you may have changed or adjusted the parameters of the memory controller. For example, the Zybo runs with a 525MHz clock according to the board support files, not a 200MHz clock or a 533 MHz clock. Can you please check your memory controller configuration against the one in the board support files here, to check that it matches? Thanks, Dan
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Mac + Analog Discovery 2 + Waveforms 2015: No device detected
D@n replied to Krizzle's question in Test and Measurement
@Krizzle, @bentwookie, @ChristopherN A couple of fun points, tangent to the conversation. First, if you start typing someone's screen name with an at (@) sign in front of it, you'll pull up a menu of possible screen names. Select from that menu @attila or @JColvin's screen name's, and the name will get highlighted here. Further, when you submit your comment, they'll get a notice that it's there--so they know something on the forum referenced them. (You should get a similar notice, since I referenced you at the top of this post.) I know sometimes the engineers lost track of active conversations that have involved them for some time, but this will help bring it to their attention. Second ... It's the Christmas holiday. (Merry Christmas everyone!) Digilent is closed for a couple days. Further, I expect several individuals on their engineering staff (don't know who ...) will be taking more extended vacations to be with family. My point? It might take the "engineering team" in question a couple days, or even perhaps a week or two, to get back to you and look at this. Digilent isn't all that large, so I doubt the "team" you are referencing is that large either. If they haven't responded here in a week or so, may I suggest you consider highlighting their names (as above) and ... they'll notice. Dan -
Would you rather this as a venue for discussion? Are you interested in further discussion?
Dan
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Well, let me start at my own experience. I have little experience designing for the FTDI chip--I've just used designs from other people that can tell me nothing about their designs.
I have never used the Cypress chip.
On one design I was a part of, the "end-point" controller you mention was a fully capable ARM. This ARM then connected to the FPGA, but still provided the USB host with some useful interfaces: block device and serial port among them. The FPGA itself was very small, providing just enough functionality for the mission of this board. I enjoyed working with this design.
The more recent design that I have insight into is the XuLA2 design. This design connects the USB to the device JTAG, and offers little to no high speed transfer capability--just a really slow JTAG. If you wish to communicate with the S6 on the XuLA board, you are limited to using the user command in JTAG--not very useful. Further, the XuLA uses a PIC to implement its communication protocol across the USB. As a final touch, the XuLA2 has a single LED on board that is controlled from the PIC, not the FPGA. This has its plusses and ... minuses.
I've tried to coach someone through using this XuLA JTAG interface. He wants to do image processing with his FPGA. However, the JTAG interface was dominating any speedup he might've received via the FPGA. Sure, he could go to an FMC connector ... but that would require a full hardware redesign for him, and he's hoping to do with what he has. His latest approach has him connecting XuLA I/O to a RPi--but I'm getting off topic.
My thought was simply this: expand upon this OpenSource capability, with a bigger PIC. Provide USB endpoints for serial, SPI, some bit-banging, and ... who knows, maybe some other things as well--but whatever you do don't cripple the interface as the XuLA's is currently. Further, the goal was to make this as generic and opensource as possible, so that other end point functions could be built as necessary.
At the same time, if your view is that trying to stuff more functionality into an endpoint controller is useless, then ... either I need to drop my approach (which would mean an end to the discussion--save only to ask what approach might be better), or you are not interested in it (again an end to the discussion), or ... well, I'm not sure where to go next. As I mentioned, I have no experience with the FTDI chip to press the discussion in that direction.
Thoughts?
Dan
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Dan,
Your last message helps clarify things.
As for the individual that you are coaching "image processing" is quite open-ended. Is it a PC or SBC communicating with a sensor? A small FPGA board tied to another FPGA board? You don't need answer those questions as they are mostly rhetorical. But you see my point, without know specifically what one wants to accomplish and what the basic requirements are... mechanical size, power requirements, thermal requirements, environmental... etc, etc, are then it's not possible to offer a solution. I had to look up XuLA2... it's a pretty small FPGA for generic image processing. (I still have one of Xess's first FPGA products sitting in a box somewhere.... though I haven't looked into them for a while). I have a LOT of USB interface experience, often involving a PC host application, and all of them had different requirements and unique FPGA interface design solutions. My only thought here is that starting with a fixed hardware platform and trying to cram a design into it rarely works unless the hardware and supporting software support are geared to that particular design. Successful engineering always starts with defining requirements, proposing a solution platform, working out the data rates of interfaces.... an idea that escapes even tech companies with scores of engineers who should know better.
For what it's worth I've used FPGA boards from Terasic ( I like their NANO boards for prototyping ), Opal Kelly, Digilent, and of course Xilinx and Altera. I have yet to find a development board that does everything I want, or has the connectivity for any project. The ATLYS from Digilent was a nice product and generally well supported. Unfortunately, Digilent was bought out by NI and has decided that instead of wasting money paying engineers to support their products they will let "volunteers" do it for free in a forum environment.
If you want to work with USB intelligently you have to get down and dirty into the nitty-gritty details by doing some designs using vendor (FTDI, Cypress, Atmel. etc.) tools. USB isn't the only interface around. 1G ethernet is a fine hose for transferring data, with a MAC or not, between boards or a board to a PC or SBC. The Genesys2 has 4 lanes of high-speed transceivers conveniently connected to DisplayPort connector. And then there's PCIe. Lately, I've been playing with ethernet PHYs and PCIe... haven't decided how to use that Genesys2 yet.
I suspect that this particular topic has been beaten to death by now but if you want to communicate further you can reach me at my email. eclektek@dejazzd.com.
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There's also an open source Verilog for a flash controller that you can find here. You'll find it valuable if you wish to access the flash from within your design, either to read from, erase, or rewrite/program it. Dan
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Just to close the discussion, and for anyone else reading, here's the command that turned character 0x01 into a backslash. Note the required <ESC>[3p at the end: <ESC>[0;16;8;4;2;1;0;0;1d<ESC>[3p Dan
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JColvin, I finally got your example working. May I highly recommend that you update your PmodCLS reference manual? The example given in the PmodCLS manual doesn't work--or at least it didn't for me. I needed to send an <ESC>[3p command after defining the character in order for it to show up on the screen. Nothing in the reference manual suggested that would be necessary. Indeed, if you could do a bit better of a job explaining the nature of that character table that is programmed into ROM from EPROM or RAM, I would appreciate it. For example, is this just the 5 (or is it 6?) user definable characters that get programmed, or is an entirely new character set being programmed? In other words, is there anyway to change the meaning of the backslash, or do I just need to suffer with using a user definable character of which (according to the MPIDE code you reference) it looks like there are only six of? Thanks, though, for your help. If the MPIDE code hadn't also done the <ESC>[3p command, I would've never gotten it! Dan
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Hello! I have just recently purchased a PModCLS board. After a bunch of hard (fun) work, I have it mostly up and running via the SPI port. As a sample project, and at the kids' suggestion, I am using a mouse (connected to a Basys-3 board) to drive the display to create 'eyeballs' that follow the mouse around, or that change their mood as the mouse moves. It's a fun project, and a fun demonstration of what the board can do. My problem is that I'd like to use the backslash as one of the text-art characters in the eyebrows, and everytime I send the device a backslash a ... foreign character appears. (It looks like a 'Y' with two horizontal bars through it.) I know that the reference manual discusses being able to reprogram characters. Can you tell me if all of the characters can be reprogrammed? In particular, can I reprogram the backslash back into a backslash? Or can I only create some special purpose characters using a limited part of the ASCII character set? Thanks! Dan
I have never used the Cypress chip.