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Interrupt PS to PL in ZYBO


diya-

Question

Posted

Hi,

I am trying to do dma transfer from PS to PL in ZYBO evaluation board. 

Using sdk example project, i am able to perform data transfer between ps and pl. Pl interrupts are mapped as 61 and 62.

I am trying to do similar data transfer using linux driver xilinx_dma.c and axidmatest.c (Linux kernel version 4.4). 

But driver gets hang if i assign interrupt number 29 & 30 in dts.

 

   axi_dma_1: dma@40400000 {
                        #dma-cells = <1>;
                        compatible = "xlnx,axi-dma-1.00.a";
                        interrupt-parent = <&intc>;
                        interrupts = <0 29 4 0 30 4>;
                        reg = <0x40400000 0x10000>;
                        clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
                        clocks = <&clkc 15>, <&clkc 15>, <&clkc 15>, <&clkc 15>;
                        xlnx,addrwidth = <0x20>;
                /*        xlnx,include-sg ;*/
                        dma-channel@40400000 {
                                compatible = "xlnx,axi-dma-mm2s-channel";
                                dma-channels = <0x1>;
                                interrupts = <0 29 4>;
                                xlnx,datawidth = <0x20>;
                                xlnx,device-id = <0x0>;
                                xlnx,include-dre ;
                        };
                        dma-channel@40400030 {
                                compatible = "xlnx,axi-dma-s2mm-channel";
                                dma-channels = <0x1>;
                                interrupts = <0 30 4>;
                                xlnx,datawidth = <0x20>;
                                xlnx,device-id = <0x0>;
                                xlnx,include-dre ;
                        };
                };

                axidmatest_1: axidmatest@1 {
                      compatible ="xlnx,axi-dma-test-1.00.a";
                      dmas = <&axi_dma_1 0
                              &axi_dma_1 1>;
                      dma-names = "axidma0","axidma1";
                };

 

and kernel msg,

unable to request IRQ 

 

Is the interrupt number mapped is right ?  

Any help or suggestion on this, 

 

3 answers to this question

Recommended Posts

Posted

Ugh, interrupt mappings. This is one of the reasons i like petalinux, because this is handled for you automatically when you import your .hdf.

Assuming your mm2s interrupt is connected to In0 of the interrupt concat block and the s2mm interrupt is connected to In1, your channel interrupts look good. I think you can get rid of the interrupts property in the parent DMA node that attempts to map both of them, according to: https://github.com/Digilent/linux-digilent/blob/master/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt.

I'm not familiar with the DMA test driver, but in these situations I typically would dig around in the dma and dmatest probe functions to see what is triggering the kernel msg you posted. Then go from there, and maybe add additional printk's to the drivers if you need them. Depending on your kernel version, the Xilinx DMA driver just may not work with the dma test driver. The driver code for the Xilinx DMA has proven to be very volatile over the years, and I remember previous cases of people not being able to get the test driver to work. You might want to try fishing around the xilinx kernel tree and see if anything has been done in regards to this recently. 

Posted

Hi,

Interrupts were registered after changing the IRQ type from level triggered to Edge triggered, but unable to perform read or write operation on  DMA register 0x40400000(even after enabling level shifter).

xilinx_dma_chan_probe(){
:
:
xilinx_dma_chan_reset()

dma_ctrl_set(chan, XILINX_DMA_REG_DMACR, XILINX_DMA_DMACR_RESET); <- hangs during write/read 
}

trying to read or write to XILINX_DMA_REG_DMACR results in hang

Posted

A shot in the dark here, but I needed to add the following property to the vdma node to get things working for the graphics driver:

	dma-ranges = <0x00000000 0x00000000 0x20000000>;

Since the VDMA core and the DMA core use the same driver, maybe it is necessary in your situation (it's also mentioned as required in the bindings doc). Note the property should be put in the dma parent node, not the channel child nodes.

If that doesn't do it, please provide some more information about your situation:

1) How are the DMA axi stream interfaces connected? Are they looped back directly to each other, or through a FIFO?

2) Please provide a link to the kernel tag you are checking out (I'm assuming it is hosted on either the Xilinx or Digilent Github, or is a fork).

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