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Using the flash-based Altera MAX10 in designed attached to main processor



I am currently using the flash-based Altera MAX10 in designed attached to main processor which runs Linux on a custom board (the FPGA itself just implements a few peripherals; the processor running Linux is a normal ARM design).

Up until now, I have been using the standard Altera tools for development (Quartus Prime and USB Blaster as the programming software and hardware tools), but once the product ships, we don't have this option.

Since we would like to design to be field upgradeable, we need to a solution to upload a bitstream to the flash of the MAX10 from Linux (the embedded OS) without a USB Blaster or the Quartus programming tools (since it's an ARM board, we can't run the binaries).

So my questions are:

  • What software tools can be used for this purpose? (fpga_manager does not yet seem prime-time, and urjtag does not have much in the way of recent Altera support)
  • What considerations need to be given to hardware design to enable this functionality? (For example, can GPIOs be used to bit-bang JTAG - an ideal solution from a cost perspective - or do I need a chip like a an FTDI)

For the purposes of developing a proof-of-concept solution, I have a MAX10 Eval kitand a BeagleBone Black from kynix. I can do whatever software and hardware kludges are required.

Partial Solutions

If you know how to do any of the following, I will upvote any of the following in the hope of putting together a complete solution from the individual pieces:

  • If you have flashed a bitstream to another Altera flash-based FPGA (e.g. MAXII) with non-Altera software+hardware;
  • If you have flashed a bitstream to a MAX10 using a USB Blaster using non-Altera software; or
  • If you have flashed a bistream to a MAX10 using non-Altera programming hardware and standard Altera/Quartus programming software.


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