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SOLVED Ethernet PHY on Zybo board using Vivado 2017.2




I'm trying to boot a linux OS ( Ubuntu core armhf ) on Zybo board.

I have done the following steps:

1. Create a project in Vivado 2017.2, a project consist of a Zynq and just one custom IP core, a led controller just to turn on and of the 4 leds on board.

2. I have successfully generated the bitstream and exported the hdf in SDK.

3. In SDK I have created a project for build the fsbl successfully

4. I have built u-boot ( git clone from xilinx repo on github ) just changing the zynq_common.h file to load just the kernel and the devicetree ( not the uramdisk because I would like to put the rootfs on sd card 2nd partition )

5. I have  built the kernel ( always from xilinx github ) using the zybo_zynq_defconfig as configuration and I have successfully generated the uImage

6. I have prepared a ubuntucorearmhf rootfs 

7. I have packaged into BOOT.BIN file the fsbl, bitstream and u-boot

8. I have used the devicetree generator from xilinx github to generate my devicetree ( files attached ), with modified bootargs properly ( I hope )

9. As you can see there is no PHY into pcw.dtsi or zynq-7000.dtsi so I have added that into a file called ethernet.dts ( made by me )  including the system-top.dts just to leave the auto-generated devicetree without modification.

10. I put the BOOT.BIN , uImage and devicetree.dtb ( compilation of ethernet.dts ) into the 1st partition of my sdcard, the rootfs into 2nd

11. At boot time the system boots without problem but it says that there is no PHY for ethernet and if I do an ifconfig the eth0 interface is absent.

I have done a mistake on binding the PHY for realtek ethernet controller??

Another step I have tried is to use the BOOT.BIN and the image.ub provided by Digilent on zybo bsp 2015.4 (Digilent-Zybo-Linux-BD-v2015.4) and like this the PHY has been found and I can see the eth0 interface.

I have also tried to understand the difference between my devicetree and the Petalinux one ( see .txt file ) without success.

I have tried to use your zybo_base_system project instead of a clean project from scratch with same results.

I have finally tried this https://github.com/MarioLizanaC/Linaro-O.S.-for-Zybo/ , a project found on github where a guy boot Linaro ( I have done it with Ubuntu core ) using as start I think your zybo_base_system but with 3.18 kernel instead of 4.9 kernel and Vivado 2015.4 instead of Vivado 2017.2 .

Thanks in advance.








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really thanks a lot for your suggestion and sorry for late reply. Now I have re-generated the bitstream and exported to SDK the hdf file, created the fsbl. Now I have to restart to compile the whole other stuffs but I'm pretty sure that with the modification you have suggested it could work. So thx again. Now I have clarified to myself the role of RGMII, MDIO and MAC to PHY connection.

I'll keep you informed.

Thanks again!!


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some good news, I have followed your suggestion and I have also removed the PHY part of devicetree that I have added and now it works!! 

Maybe as described on "ZYBO FPGA Board Reference Manual" :

"Although the default power-up configuration of the PHY might be enough in most applications, the MDIO bus is
available for management."

so maybe it is not really necessary the PHY level in fact I can see from boot log that the RTL8211E will be automatically recognized.

Thanks again, with this problem I have understood many things about devicetree and other things.


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