zygot Posted August 26, 2017 Share Posted August 26, 2017 @D@n, that prolific poster of mostly helpful information on any topic suggested that I create this thread. I suggested that he create the thread knowing how dear to his heart the subject is. ( actually it's one dear to my heart as well... hence this thread ) Since he hasn't done so I guess that it's up to me. I agree that a place to bounce some thoughts on the topic is a good idea that might benefit a large audience. So, I'll start of the discussion with this: I've been concentrating on FPGA development for a long time but doing hardware and software development for a lot longer. I LOVE the idea of a SOC in an FPGA. I LOVE the fact that all of the FPGA vendors have teamed up with ARM to include hard CPU cores in some of their products. We aren't quite there yet as to having a real SOC, though the Cypress PSOC line is close though limited in the area of programmable logic. No company that I've ever worked for uses a device because it's a cool thing to do. ( OK, I'll back off that statement because I did do work for a small company doing radar research and decided that using GaAs logic would help secure an SBIR grant. ). There are a lot of things that one considers when designing a product that you want to make a profit on. I've used soft CPU cores in my own projects but only one for a commercial application ( and that was for a startup building equipment to demonstrate their IP, not for a product meant to be sold). To get to the point I'll start off with a few assertions as to why I haven't, over the course of 20 years of FPGA development experience ) used a soft CPU in a commercial product. Soft CPU cores use a lot of resources. Filling an FPGA with a soft CPU core with no room for including the kinds of things that programmable logic is good at makes absolutely no sense ( to me ) Why waste the valuable resources of an expensive, power hungry FPGA when a low power highly integrated, high performance micro will do a better job, offering more on board memory, more functional blocks, lower power, more power saving options, well you get the idea.... While the Xilinx support for ZYNQ is excellent and in some areas better than the software toolchain for embedded processors from companies that only make micro-controllers, by and large the tool chains offered by the micro companies are more stable and easier to use. A CPU in and FPGA just adds to the headaches, tool bugs and work-arounds, and general effort of developing a design. Who needs more work? I'm all for using soft CPU cores in an FPGA... there just aren't a lof of applications that demand one. It's rare that I can't use traditional HDL constructs like state machines or programmable controllers to achieve what the aims for an FPGA design. There may well be a application that requires a soft CPU core because the state machines get too complex, though I expect that I'd just use an FPGA with a hard ARM core for that case. If anyone reading this wants to go through the work of using a MicroBlaze or NIOS using tutorials that might work with old versions of Vivado or Quartus but nit the one that you have, as an educational exercise I am whole heartedly in support. And it will be an educational experience in many ways. That should be enough to start the fireworks. I didn't even include the comments that prompted D@n to suggest this thread for the sake of harmony. Link to comment Share on other sites More sharing options...
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