I apologize if this is in the wrong sub-forum. I am trying to build an Arty Z-20 project from the create_project.tcl found in most Digilent Projects /proj folder. I am working with the Arty-Z7-20-linux_bd-master project. I am using Xilinx Vivado 64-bit 2016.4. I see the following:
Starting SDK. This could take few seconds... done
Importing project video_bsp... [DONE]
Importing project video... [DONE]
rlwrap: warning: your $TERM is 'xterm-256color' but rlwrap couldn't find it in the terminfo database. Expect some problems.: Inappropriate ioctl for device
while executing
"exec xsct -eval "setws -switch ../sdk; importproject ../sdk""
invoked from within
"if {[llength $sdk_list] != 0} {
exec xsct -eval "setws -switch ../sdk; importproject ../sdk"
}"
(file "create_project.tcl" line 152)
make_wrapper -files [get_files /home/jig-1/arty_z20/Arty-Z7-20-linux_bd-master/src/bd/linux_bd/linux_bd.bd] -top
ERROR: [BD 41-1665] Unable to generate top-level wrapper HDL for the BD-design 'linux_bd.bd' is locked. Locked reason(s):
* BD design contains locked IPs. Please run report_ip_status for more details and recommendations on how to fix this issue.
List of locked IPs:
linux_bd_axi_dynclk_0_0
linux_bd_rgb2dvi_0_0
ERROR: [Common 17-39] 'make_wrapper' failed due to earlier errors.
Question
jigish
All,
I apologize if this is in the wrong sub-forum. I am trying to build an Arty Z-20 project from the create_project.tcl found in most Digilent Projects /proj folder. I am working with the Arty-Z7-20-linux_bd-master project. I am using Xilinx Vivado 64-bit 2016.4. I see the following:
Starting SDK. This could take few seconds... done
Importing project video_bsp... [DONE]
Importing project video... [DONE]
rlwrap: warning: your $TERM is 'xterm-256color' but rlwrap couldn't find it in the terminfo database. Expect some problems.: Inappropriate ioctl for device
while executing
"exec xsct -eval "setws -switch ../sdk; importproject ../sdk""
invoked from within
"if {[llength $sdk_list] != 0} {
exec xsct -eval "setws -switch ../sdk; importproject ../sdk"
}"
(file "create_project.tcl" line 152)
make_wrapper -files [get_files /home/jig-1/arty_z20/Arty-Z7-20-linux_bd-master/src/bd/linux_bd/linux_bd.bd] -top
ERROR: [BD 41-1665] Unable to generate top-level wrapper HDL for the BD-design 'linux_bd.bd' is locked. Locked reason(s):
* BD design contains locked IPs. Please run report_ip_status for more details and recommendations on how to fix this issue.
List of locked IPs:
linux_bd_axi_dynclk_0_0
linux_bd_rgb2dvi_0_0
ERROR: [Common 17-39] 'make_wrapper' failed due to earlier errors.
-- Can someone please advise.
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