rpm886 Posted June 14, 2017 Share Posted June 14, 2017 I recently purchased two Arty Z7-20 boards and both the HDMI In and Out demo projects fail to be created in Vivado 2016.4. I'm following these instruction: https://reference.digilentinc.com/learn/programmable-logic/tutorials/arty-z7-hdmi-in-demo Fails on Running make_wrapper (screen freezes) after create_project.tcl I read on forum that this may be needed to be installed: Digilent/vivado-library However the git clone fails. Can anyone please help? Link to comment Share on other sites More sharing options...
artvvb Posted June 14, 2017 Share Posted June 14, 2017 What happens if you right click on the BSP and select "re-generate BSP sources"? Link to comment Share on other sites More sharing options...
jpeyron Posted July 13, 2017 Share Posted July 13, 2017 Hi @rpm886, After some research and talking to the creator of the arty-Z7 HDMI-OUT project I was able to fix the issue. We will fix the project on github in the next few days but with the existing project all you need to do is delete the fsbl and fsbl_bsp (selecting the project contents on the disk). Then create a new application. Name it fsbl , select next and choose zynq fsbl and then click finish. I just did this and confirmed that it works on my monitor using tera term. cheers, Jon Link to comment Share on other sites More sharing options...
rpm886 Posted June 17, 2017 Author Share Posted June 17, 2017 Jon My zipped up HDMI_Out project is to large to post. The errors I was getting in SDK are posted above. Are there any smaller files I can post that would help? Thanks for your help. Bob Link to comment Share on other sites More sharing options...
jpeyron Posted June 16, 2017 Share Posted June 16, 2017 Hi @rpm886, I got similar errors in sdk with the HDMI-OUT in Ubuntu and in Window. I have reached out to the creator of the HDMI-OUT demo about this issue. thank you, Jon Link to comment Share on other sites More sharing options...
jpeyron Posted June 15, 2017 Share Posted June 15, 2017 Hi @rpm886, Could you send me screen shots of what your sdk HDMI-OUT project looks like as well as attach your project compressed? I have attached a file that has screen shots of whats in HDMI-IN and HDMI-IN_bsp as well as the what the terminal menu when the board is programmed. I am working on the HDMI-OUT. cheers, Jon screenshots.odt Link to comment Share on other sites More sharing options...
rpm886 Posted June 15, 2017 Author Share Posted June 15, 2017 So I finally got the HDMI_In and out to be created properly AND HDMI_In is finally working!!!! However, Hdmi_Out Demo is still reporting missing IP errors in the SDK. Is the Vivado_Libary repo in github correct for hdmi_out demo? Link to comment Share on other sites More sharing options...
rpm886 Posted June 15, 2017 Author Share Posted June 15, 2017 Jon I downloaded the vivid-library and copied the contents to the repo folder of the projects cdmi_in and out. As before (I did this earlier) when I create the project using create_project.tcl' vivid hangs at: screen freezes forever and I have to kill the process. What's different is if I reboot I can create a bitstream from the project that froze previously BUT when I export to SDK and launch SDK I get errors: From Log 12:11:00 INFO : XSCT server has started successfully. 12:11:00 INFO : Successfully done setting XSCT server connection channel 12:11:00 INFO : Successfully done setting SDK workspace 12:11:00 INFO : Registering command handlers for SDK TCF services 12:11:00 INFO : Processing command line option -hwspec /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/proj/hdmi-out.sdk/hdmi_out_wrapper.hdf. 12:11:01 INFO : Checking for hwspec changes in the project hdmi_out_wrapper_hw_platform_0. 12:11:01 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 27 - No IP instance named axi_gpio_btn present in hardware design ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 39 - No IP instance named axi_gpio_led present in hardware design ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 45 - No IP instance named axi_gpio_sw present in hardware design ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 255 - No IP instance named ps7_uart_1 present in hardware design 12:11:01 ERROR : (XSDB Server)ERROR: [Hsi 55-1452] Error: running open_sw_design. 12:11:01 ERROR : [Common 17-39] 'hsi::open_sw_design' failed due to earlier errors. 12:11:01 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 27 - No IP instance named axi_gpio_btn present in hardware design 12:11:01 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 39 - No IP instance named axi_gpio_led present in hardware design ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 45 - No IP instance named axi_gpio_sw present in hardware design 12:11:01 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 255 - No IP instance named ps7_uart_1 present in hardware design 12:11:01 ERROR : (XSDB Server)ERROR: [Hsi 55-1452] Error: running open_sw_design. 12:11:01 INFO : Unable to read in MSS file /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss : null 12:11:01 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 27 - No IP instance named axi_gpio_btn present in hardware design 12:11:01 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 39 - No IP instance named axi_gpio_led present in hardware design 12:11:01 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 45 - No IP instance named axi_gpio_sw present in hardware design 12:11:01 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/HDMI/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 255 - No IP instance named ps7_uart_1 present in hardware design 12:11:01 ERROR : (XSDB Server)ERROR: [Hsi 55-1452] Error: running open_sw_design. 12:11:01 ERROR : Failed in generating sources 12:11:01 INFO : BSP Project P/fsbl_bsp has been successfully migrated. Link to comment Share on other sites More sharing options...
jpeyron Posted June 15, 2017 Share Posted June 15, 2017 Hi @rpm886, I found an xilinx forum thread here that talks about this issue. So when you download the HDMI_in/out demo's you also need to download the vivado library folder in the repo folder here(hdmi-in) and here(hdmi-out) as well. Then in your downloaded project you need to put the contents of the vivado library download into the vivado library folder in the repo folder. You know that you have done this correctly when you go into repo->vivado library in the downloaded project and it has the contents from here(hdmi-in) and here(hdmi-out) in it. cheers, Jon Link to comment Share on other sites More sharing options...
rpm886 Posted June 15, 2017 Author Share Posted June 15, 2017 Found an issue with my SDK install following this link: https://www.lvoudouris.com/installing-xilinx-vivado-2016-4-and-intel-modelsim-starter-edition-16-1-on-64-bit-ubuntu-16-10-2/ It's probably because libstdc++.so.6 shipped with SDK is an older/incompatible version. The solution is to use your system's library instead. In a terminal execute the following commands sudo mv /opt/Xilinx/SDK/2016.4/lib/lnx64.o/libstdc++.so.6 /opt/Xilinx/SDK/2016.4/lib/lnx64.o/libstdc++.so.6.orig sudo ln -s /usr/lib/x86_64-linux-gnu/libstdc++.so.6 /opt/Xilinx/SDK/2016.4/lib/lnx64.o/libstdc++.so. So NOW I can compile Jon's project BUT my hopefully last problem is this: I'm confused because the FPGA programed fine from SDK but something isn't configured correctly. Once I figure this out I need to go back to the original issue ... I still can only load Jon's project in Vivado and can NOT create the hdmi_in/out demos using "create" and git clone "repo'o mv /opt/Xilinx/SDK/2016.4/lib/lnx64.o/libstdc++.so.6 /opt/Xilinx/SDK/2016.4/lib/lnx64.o/libstdc++.so.6.orig sudo ln -s /usr/lib/x86_64-linux-gnu/libstdc++.so.6 /opt/Xilinx/SDK/2016.4/lib/lnx64.o/libstdc++.so.6 Link to comment Share on other sites More sharing options...
rpm886 Posted June 15, 2017 Author Share Posted June 15, 2017 So I started over from scratch using the hdmi_in demo and I still have issues creating the project using source ./create_project.tcl' : It hangs at: I'm cloning from: git clone https://github.com/Digilent/Arty-Z7-20-hdmi-in.git It there something missing from this repo? //-----------------------------------------------------------// I gave up and downloaded Jon's project Arty-Z7-20-hdmi-in-master.tar.gz It loads into vivido fine. I can generate bitstream and export into the SDK fine. I can import the project and program the FPGA. However, when I try to run the .elf I get this: Any suggestions? Link to comment Share on other sites More sharing options...
jpeyron Posted June 15, 2017 Share Posted June 15, 2017 Hi @rpm886, Throughout today I downloaded and installed vivado/sdk 2016.4 and ran the hdmi-in for the Arty-z7-20. When you have generated the bitstream and exported the sdk you should move the hdmi-in and hdmi-in_bsp from the sdk folder in to the project folder. Then launch sdk. I then import the hdmi-in and hdmi-in_bsp and you should be ready to go! I have attached my project below. cheers, Jon Arty-Z7-20-hdmi-in-master.tar.gz Link to comment Share on other sites More sharing options...
rpm886 Posted June 14, 2017 Author Share Posted June 14, 2017 No I can Generate Bitstream and Export to SDK and SDK launches fine. However these errors appear in SDK Log: 13:56:25 INFO : Registering command handlers for SDK TCF services 13:56:25 INFO : Launching XSCT server: xsct -n -interactive /home/rpm886/Arty-Z7-20-hdmi-out/proj/hdmi-out.sdk/temp_xsdb_launch_script.tcl 13:56:26 INFO : XSCT server has started successfully. 13:56:27 INFO : Successfully done setting XSCT server connection channel 13:56:27 INFO : Successfully done setting SDK workspace 13:56:27 INFO : Processing command line option -hwspec /home/rpm886/Arty-Z7-20-hdmi-out/proj/hdmi-out.sdk/hdmi_out_wrapper.hdf. 13:56:27 INFO : Checking for hwspec changes in the project hdmi_out_wrapper_hw_platform_0. 13:56:29 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 27 - No IP instance named axi_gpio_btn present in hardware design 13:56:29 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 39 - No IP instance named axi_gpio_led present in hardware design ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 45 - No IP instance named axi_gpio_sw present in hardware design ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 255 - No IP instance named ps7_uart_1 present in hardware design ERROR: [Hsi 55-1452] Error: running open_sw_design. 13:56:29 ERROR : [Common 17-39] 'hsi::open_sw_design' failed due to earlier errors. 13:56:29 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 27 - No IP instance named axi_gpio_btn present in hardware design 13:56:29 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 39 - No IP instance named axi_gpio_led present in hardware design ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 45 - No IP instance named axi_gpio_sw present in hardware design ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 255 - No IP instance named ps7_uart_1 present in hardware design ERROR: [Hsi 55-1452] Error: running open_sw_design. 13:56:29 INFO : Unable to read in MSS file /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss : null 13:56:29 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 27 - No IP instance named axi_gpio_btn present in hardware design ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 39 - No IP instance named axi_gpio_led present in hardware design ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 45 - No IP instance named axi_gpio_sw present in hardware design 13:56:29 ERROR : Failed in generating sources 13:56:29 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 255 - No IP instance named ps7_uart_1 present in hardware design ERROR: [Hsi 55-1452] Error: running open_sw_design. 13:56:29 INFO : BSP Project P/fsbl_bsp has been successfully migrated. Also NOTE ERRORS IN Project Explorer: Link to comment Share on other sites More sharing options...
artvvb Posted June 14, 2017 Share Posted June 14, 2017 @rpm886 These errors are occuring even when you Generate Bitstream -> Export to SDK -> Launch SDK in Vivado? Link to comment Share on other sites More sharing options...
rpm886 Posted June 14, 2017 Author Share Posted June 14, 2017 So Now that I'm creating a project I could run block design validation: And as my previous message noted I can now launch SDK , however I'm still getting these: 13:17:09 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 27 - No IP instance named axi_gpio_btn present in hardware design 13:17:09 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 39 - No IP instance named axi_gpio_led present in hardware design 13:17:09 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 45 - No IP instance named axi_gpio_sw present in hardware design 13:17:09 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 255 - No IP instance named ps7_uart_1 present in hardware design Link to comment Share on other sites More sharing options...
rpm886 Posted June 14, 2017 Author Share Posted June 14, 2017 Arthur So I've made more progress but not there yet. For those out there installing Xilinx Vivado & SDK from scratch on Ubuntu 16.04. Read This: https://askubuntu.com/questions/761604/eclipse-not-working-in-16-04 SDK won't launch without adding this to eclipse.ini: --launcher.GTK_version 2 Now that my SDK is launching .... I'm running into this problem when trying to program from SDK: 13:17:09 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 27 - No IP instance named axi_gpio_btn present in hardware design 13:17:09 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 39 - No IP instance named axi_gpio_led present in hardware design 13:17:09 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 45 - No IP instance named axi_gpio_sw present in hardware design 13:17:09 ERROR : (XSDB Server)ERROR: [Hsi 55-1403] /home/rpm886/Arty-Z7-20-hdmi-out/sdk/fsbl_bsp/system.mss line 255 - No IP instance named ps7_uart_1 present in hardware design 13:17:09 ERROR : (XSDB Server)ERROR: [Hsi 55-1452] Error: running open_sw_design. Any suggestions? Bob Link to comment Share on other sites More sharing options...
artvvb Posted June 14, 2017 Share Posted June 14, 2017 rpm886, I am wondering if this is an OS related issue, I am running Windows 8.1, so this seems likely. Going to have a coworker with an ubuntu VM attempt to debug your issue further. Block design validation would only do anything after create_project has completed. With the submodule fully checked out, there shouldn't be any fundamental problems with missing source files, outside of vivado having trouble with Linux (ubuntu?) file paths, which I don't believe that it does. Are you able to launch Vivado SDK directly, rather than through Vivado? I am unsure how you would do this in linux... Arthur Link to comment Share on other sites More sharing options...
rpm886 Posted June 14, 2017 Author Share Posted June 14, 2017 Arthur So I rebooted after it froze and I was able to generate a bit stream!! Progress! (Still not sure why it hangs on creation) But I'm now having trouble. I'm hanging when I Launch the SDK: ****** Xilinx Software Development Kit ****** SDK v2016.4 (64-bit) **** SW Build 1756540 on Mon Jan 23 19:11:19 MST 2017 ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. Launching SDK with command /opt/Xilinx/SDK/2016.4/eclipse/lnx64.o/eclipse -data /home/rpm886/Arty-Z7-20-hdmi-out/proj/hdmi-out.sdk -vmargs -Dcom.xilinx.sdk.args.hwspec=/home/rpm886/Arty-Z7-20-hdmi-out/proj/hdmi-out.sdk/hdmi_out_wrapper.hdf -Xms64m -Xmx512m -Dorg.eclipse.swt.internal.gtk.cairoGraphics=false This is a new vivid install. Bob Link to comment Share on other sites More sharing options...
rpm886 Posted June 14, 2017 Author Share Posted June 14, 2017 Hi Arthur Thanks for the quick response. So I was able to install the vivado-library in my user directory after all (Not sure why it failed earlier). However the create_project.tcl still fails and freezes here: I I did not use the zip files. I cloned the git repos for both cdmi in and out. Here is what the sub dir look like: rpm886@ubuntu:~/Arty-Z7-20-hdmi-in$ ls -ralt total 44 -rw-rw-r-- 1 rpm886 rpm886 168 Jun 14 13:47 README.md drwxrwxr-x 2 rpm886 rpm886 4096 Jun 14 13:47 hw_handoff -rw-rw-r-- 1 rpm886 rpm886 116 Jun 14 13:47 .gitmodules -rw-rw-r-- 1 rpm886 rpm886 1461 Jun 14 13:47 .gitignore drwxrwxr-x 4 rpm886 rpm886 4096 Jun 14 13:47 repo drwxrwxr-x 2 rpm886 rpm886 4096 Jun 14 13:47 proj drwxrwxr-x 4 rpm886 rpm886 4096 Jun 14 13:47 sdk drwxrwxr-x 8 rpm886 rpm886 4096 Jun 14 13:47 . drwxrwxr-x 7 rpm886 rpm886 4096 Jun 14 13:47 src drwxrwxr-x 8 rpm886 rpm886 4096 Jun 14 13:47 .git drwxr-xr-x 29 rpm886 rpm886 4096 Jun 14 13:49 .. I then ran: git submodule init and git submodule update from within the repo directories. which reinstalled the lib: Submodule path 'repo/vivado-library': checked out '253458c61c2baead8eb3e5f94110d827317791b9' Now it freezes at a different place here: It never returns from create so will not sure what "Attempting to run validation of the block design after create_project" will show. Had to reboot and but not sure where to find "validation of the block design". F6 did nothing. ??? Anything else I could try? Bob Link to comment Share on other sites More sharing options...
artvvb Posted June 14, 2017 Share Posted June 14, 2017 @rpm886 After running through generation of the project and reproducing what is likely your bug (picture attached), it looks like not all of the required files were included in the release zip archive for the project. You should be able to get the project running by cloning the hdmi project repository and using that to follow all steps of the tutorial after downloading and extracting the ZIP archive. Alternatively, the git submodule route I mentioned in the previous post may also work, as long as the git shell recognizes the extracted directory as a git repo. Sorry for the inconvenience... Arthur Link to comment Share on other sites More sharing options...
artvvb Posted June 14, 2017 Share Posted June 14, 2017 @rpm886 Could you provide a screenshot of the contents of your Arty-Z7-20-hdmi-in repo's /repo/ subdirectory? When you say that the clone of vivado-library failed, are you able to provide any more specific information on why or how, like specific error messages? You may need to run "git submodule init" then "git submodule update" in a Git shell within your Arty-Z7-20-hdmi-in repo directory rather than cloning vivado-library directly. This will effectively clone vivado-library into the proper place within the repo, I am not sure that this will work without knowing why directly cloning vivado-library failed. Attempting to run validation of the block design after create_project may also help show where the issues are (F6 keyboard shortcut). I will attempt to reproduce your bug and then get back to you, let me know if any of my suggestions uncover more information. Thanks, Arthur Link to comment Share on other sites More sharing options...
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rpm886
I recently purchased two Arty Z7-20 boards and both the HDMI In and Out demo projects fail to be created in Vivado 2016.4.
I'm following these instruction:
https://reference.digilentinc.com/learn/programmable-logic/tutorials/arty-z7-hdmi-in-demo
Fails on Running make_wrapper (screen freezes) after create_project.tcl
I read on forum that this may be needed to be installed:
Digilent/vivado-library
However the git clone fails.
Can anyone please help?
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