Interfacing ov7670 with zedboard

[Tarini]

Hello

I am  trying to interface zedboard with ov7670 my Bitstream is generated but  when  I program using  hardware target . It's getting programmed but  not showing  the output. Instead there  are 2 warnings the debug hub vote was  not detected  at user scan chain 1or 3

1) Make sure clock  connected  to debug hub core  is in free  running clock and is active OR

2)manually launch hw_server  one

I read hamsters sir  telling something  about clock in xdc in one of same  error post. I didn't  understood  that.   sir can u please  go  through  my xdc file. I m attaching it. 

Regards

Tarini 

zedboard.xdc

[jpeyron]

HI @Tarini,

Have you looked at this xilinx forum thread here? In this case I do not believe you included the last part of the xdc file which can be found here.

	# IOSTANDARD Constraints
	#
	# Note that these IOSTANDARD constraints are applied to all IOs currently
	# assigned within an I/O bank. If these IOSTANDARD constraints are
	# evaluated prior to other PACKAGE_PIN constraints being applied, then
	# the IOSTANDARD specified will likely not be applied properly to those
	# pins. Therefore, bank wide IOSTANDARD constraints should be placed
	# within the XDC file in a location that is evaluated AFTER all
	# PACKAGE_PIN constraints within the target bank have been evaluated.
	#
	# Un-comment one or more of the following IOSTANDARD constraints according to
	# the bank pin assignments that are required within a design.
	# ----------------------------------------------------------------------------
	# Note that the bank voltage for IO Bank 33 is fixed to 3.3V on ZedBoard.
	set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 33]];
	# Set the bank voltage for IO Bank 34 to 1.8V by default.
	# set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 34]];
	# set_property IOSTANDARD LVCMOS25 [get_ports -of_objects [get_iobanks 34]];
	set_property IOSTANDARD LVCMOS18 [get_ports -of_objects [get_iobanks 34]];
	# Set the bank voltage for IO Bank 35 to 1.8V by default.
	# set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 35]];
	# set_property IOSTANDARD LVCMOS25 [get_ports -of_objects [get_iobanks 35]];
	set_property IOSTANDARD LVCMOS18 [get_ports -of_objects [get_iobanks 35]];
	# Note that the bank voltage for IO Bank 13 is fixed to 3.3V on ZedBoard.
	set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 13]];

 

 

cheers,

 

Jon