vvk Posted November 7, 2016 Share Posted November 7, 2016 I am working with zed board.please provide me with reference designs with AXI Traffic Generation IP core which should configured in slave loop back mode . Link to comment Share on other sites More sharing options...
D@n Posted November 7, 2016 Share Posted November 7, 2016 Try this: after you generate the core, right click on the core within your design. In the menu that comes up, select "Open IP Example Design", and you should be good to go. Dan Link to comment Share on other sites More sharing options...
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vvk
I am working with zed board.please provide me with reference designs with AXI Traffic Generation IP core which should configured in slave loop back mode .
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