Syzygy DNA for custom Pod

[connoisseur_de_mimi]

I've created a custom Syzygy pod for internal use with an Eclypse-Z7. It is based on the Syzygy PCB Templates project and has an Attiny44 on board. It does not use the VIO voltage but needs the FPGA to use 3.3 V logic levels to communicate.

I have checked out the Syzygy Tools and created my own DNA definition, based on what I've seen in other definitions:

{
	"max_5v_load":   200,
	"max_3v3_load":  200,
	"max_vio_load":  200,
	"is_lvds":       false,
	"is_doublewide": false,
	"is_txr4":       false,
	"vio": [
		{ "min": 330, "max": 330 },
		{ "min": 0,   "max": 0 },
		{ "min": 0,   "max": 0 },
		{ "min": 0,   "max": 0 }
		],
	"manufacturer_name": "AWESOME INC.",
	"product_name":      "SZG-CHARLIE",
	"product_model":     "SZG-CHARLIE",
	"product_version":   ""
}

I then used the syzygy-tools.py script to create a .hex file from that definition and flashed this hex file to EEPROM, avr-dna-fw-main.hex to flash and set the fuses to the values found in the python script

Uefuse:w:0xFE:m -Uhfuse:w:0xDD:m -Ulfuse:w:0xE2:m

Flashing was successful (using myAVR ProgTool, the script does not support my mySmartUSB light), but the VIO voltage regulators are not enabled - the LEDs stay off (LD2 and LD3).

Does anyone see what I may have done wrong?

Edited October 11, 2023 by connoisseur_de_mimi
added board info

[connoisseur_de_mimi]

I dug a little deeper using the dpmutil library. SyzygyReadDNAHeader() called in dpmutilFEnum() reads 0xFF only from EEPROM. I2C communication appears to work correctly, at least the I2C HAL does not return any errors, which should also mean the firmware is running correctly. I have read out the EEPROM with avrdude, it matches the file created by syzygy-tools.py. Lots of dead ends.

What solved this issue in the end was patching the syzygy-tools.py script to work with my programmer and using it to flash the Pod MCUs 😩 Vio is now set as defined in the dna json.

[connoisseur_de_mimi]

I was able to read the Syzygy Port Info containing the fsStatus Byte

struct {
  unsigned fPresent:1;
  unsigned fDW:1;
  unsigned f5v0InLimit:1;
  unsigned f3v3InLimit:1;
  unsigned fVioInLimit:1;
  unsigned rsv1:1;
  unsigned rsv2:1;
  unsigned fAllowVioEnable:1;
};
BYTE fsStatus;

having the value 0x1d, everything seems to be in order except the fAllowVioEnable bit, which is 0.

 

I also tried to change the Vio min / max settings (all within the voltage range given on the Eclypse-Z7 reference page) but no change.

Edited October 12, 2023 by connoisseur_de_mimi