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AXI EMC make connection external and assign pins.

Manuel Abbatemarco



I am having a basic MIcoroblaze design on Arty-S7 board from digilent, I want to add the AXI EMC to read from an external SRAM, I have made the output port for this IP block external by right click on it, getting this


I have added from digilent github page the .xdc file for this board (Arty-S7-50-Master.xdc).

At this point I know I have to assign signals from EMC IP block to physical pins, but I am not sure the recommended way to do this. 

I understand the EMC_INTF_0 is a bus containing all the signals that my configured memory controller need, so not all signal will be used for a given memory, then how can I define where the signals for my simple sram memory need to be defined. 

For my sram I need data bus, address bus, chip enable, output enable and write enable similar to the SRAM example of the PG100 guide () for the IP.


Is that possible or do I need to use individual ports from the EMC IP block?


the external interface property shows


let's say I want to assign the data bus, should I uses something like sram_mem_dq[15:0] on my new xdc file ?

The other question is that it seems the tools have default assignments for this signals on my Digilent Arty-S7 board, so I presume defining those in .xdc file will override those? Please correct me here if wrong.

Will appreciate comments. Thanks in advance,



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Is the SRAM connected to the board via some Pmod ports or other IO?

If you want to be sure about what the top level ports that need to be constrained for any particular design are, check the generated HDL wrapper's port map, it includes all of the individual names for ports that need to be constrained for each interface. GPIO are a common example, since the pins' actual port names differ depending on whether the interface is output only, input only, or use tristate buffers.




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Hi Artur,

More than to be sure I want to be able to assign the needed SRAM signals to my design, I am not using any PMOD particular hardware, just breadboarding my own SRAM memory. So I want to asssign the control, data and address signals. 

By the way, how do you access the generated hdl wrapper file in Vivado as you have shown?



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