hilarikas Posted August 16, 2016 Share Posted August 16, 2016 I unable to resolve the issue please kindly fix this if anyone had experience in this..... img.vhd mat_ply.vhd bram1.coe Link to comment Share on other sites More sharing options...
hilarikas Posted August 16, 2016 Author Share Posted August 16, 2016 I tried it but i unable to resolve it..I'm getting this error [USF-XSim 62] 'compile' step failed with error(s) while executing 'C:/Users/ISRO/Desktop/FPGA/VHDL_CODING/SRIRAM/100_100_ram_writing/100_100_ram_writing.sim/sim_1/behav/compile.bat' script. Please check that the file has the correct 'read/write/execute' permissions and the Tcl console output for any other possible errors or warnings. code.txt Link to comment Share on other sites More sharing options...
D@n Posted August 16, 2016 Share Posted August 16, 2016 @hilarikas, From your comments, it looks like this may be the first time you've run Vivado? The error you are getting looks like a configuration error. Admittedly, it's not one I've seen before, but let's see what we can do to fix it. Have you looked at the Tcl console output for any information? You can find this output by looking at the bottom of the Vivado window. Across the bottom you'll see several tabs, and one will be for the Tcl console output. Let me suggest you read this looking for an error, and if it doesn't make any sense post it back here and I'll take a look at it. How about the error itself? Can you create a file in the directory, 'C:/Users/ISRO/Desktop/FPGA/VHDL_CODING/SRIRAM/100_100_ram_writing/100_100_ram_writing.sim/sim_1/behav/'? Or ... does the directory not exist? (Look carefully for spelling errors here, they can be subtle but really annoying.) Hope this helps, although I'm concerned that if you've been banging your head against this for hours that there might be something else there. I look forward to hearing your answer, and (possibly) seeing your Tcl console output. Dan Link to comment Share on other sites More sharing options...
hilarikas Posted August 17, 2016 Author Share Posted August 17, 2016 Thanks dan Whenever i run the simulation I'm getting this error very often. i could not solve it it please tell me where i made a mistake "Please check that the file has the correct 'read/write/execute' permissions and the Tcl console output for any other possible errors or warnings." here is the code i attached it bram1.coe mat_ply.vhd img1.vhd Link to comment Share on other sites More sharing options...
D@n Posted August 17, 2016 Share Posted August 17, 2016 @hilarikas, This isn't about your code. Can you please attach your Tcl console output, and tell me whether the directory in questoin exists? Thanks, Dan Link to comment Share on other sites More sharing options...
D@n Posted August 17, 2016 Share Posted August 17, 2016 @hilarikas, From what you've told us above, there is a problem with your Vivado configuration and/or installation. While there may well be problems with your VHDL code as well, that's not what's causing the error you posted. According to the error you have posted above, 1) Vivado is unable to write to a file in one of your directories. As far as I can tell, none of the files you've sent direct Vivado to write to any directories, so ... I would need more information to know what is going on. For example, are you filling up your drive at some point? Is a configuration directory missing? Is a network drive unavailable? 2) The error specifically states that there is more information about the error listed/given in the Tcl console output. That information might help me understand what your problem is. If you could attach that output, it might help. If you could tell us if the directory the file is supposed to be in exists, that might also help. It is also possible that this bug is due to how your network is set up and whether or not you are using shared files from across your network. If that's the case, you local systems administrator might be able to help. It's just that ... none of these problems directly involves what is in the VHDL files you posted. Yours, Dan Link to comment Share on other sites More sharing options...
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hilarikas
I unable to resolve the issue please kindly fix this if anyone had experience in this.....
img.vhd
mat_ply.vhd
bram1.coe
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