Trace impedance to JA and JB

[KellyW]

Hi, I am attaching a device with parallel bus to Arty S7 JA and JB connectors. It is transferring 68Mbps data per line  through JA and JB. Receiving data are totally distorted. May I know the frequency limit on these traces from FPGA to JA and JB based on Arty S7 layout? Thank you. Impedance on traces from FPGA to other connectors information would be helpful . If somehow, Arty S7 is not meant for 68Mbps signals, do you have suggestion on other Spartan 7 demo board? Thank you in advance. 

[zygot]

Experiments that I've done with Digilent so called high speed differential headers suggest that expecting to implement 68 Mbsp toggle rates to an external device is probably overly optimistic. Below 50 Mbps? Sure, if you are careful. Of course there are a lot of considerations involved:

• There's no consistency with these PMODs between Digilent's boards, except that _n/_p pairs are length matched to within about 20 mm. The traces connecting the FPGA to the PMOD headers are laid out differentially with 100 ohm impedance beween pin pairs ( at least on the boards that I've used). This is might be problematic for single-ended designs. Since none of the boards with these PMODs support any differential IOSTANDARD they are constrained to single-ended logic. It's possible to implement TMDS33 IOSTANDARD logic if you add 50 ohm termination. You won't be able to place termination at an optimal point for receiving signals and TMDS has its own set of issues to deal with. If you are going that route you might as well use HDMI connectors designed specifically for TMDS.
• Some boards expose a clock-capable pin to at least one of these PMODs. Some boards don't. The Arty S7 does for JB[3:4] The lack of a clock-capable pin makes receiving signals impossible for source-synchronous designs.
• Digilent doesn't attempt to match all eight pairs. This might be a problem for bussed interface lines when the FPGA is driving signals to the external device. For most Series7 devices you can use IDELAY features of the IOB to correct minor skew for signals driven into the FPGA. The amount of delay is very limited. I have no experience with Spartan7 devices in this regard.
• The Spartan7 is a low performance Series7 family.
• It matters whether your application is source-synchronous with a reference clock or if the data sink is using oversampling asynchronously to receive data. Achieving tight signal timing across multiple signals from source pin to sink pin, even for a higher performance family would be non-trivial at 68 Mbps toggle rates.
• Above 50 MHz maintaining high signal quality PCB trace characteristics becomes important. PMOD connectors are not optimal, but should work at your rates. The problem is that Digilent PMODs aren't designed for any particular purpose so you don't have optimal transmission lines just between the FPGA and the PMOD header. Then you have to go through another similar header to the device that you are connecting to. Impedance discontinuities and capacitive loading start becoming important considerations needing control.

It's a mystery why these "differential PMODs" keep appearing on Digilent boards that don't support differential signalling. The Spartan6 ATLYS s the only exception as it has 1 PMOD connected to an IO bank that can be powered by 2.5V. Digilent has never made a product for use with these things. It's sad, but Digilent, since Series7 came out, just has no interest in making the kind of FPGA development board that you want. It wasn't that way with their Spartan 3 or Spartan 6 boards. It certainly wasn't that way for boards that designed for third parties in the past.

I am not saying that you can't do what you want to do with a Digilent FPGA board, but you might want to look into boards with FMC, HSMC or SYZYGY connectors for your project.  

Edited February 10, 2023 by zygot

[KellyW]

Zygot, thank you very much for your help in clarifying performance of this demo board.  According to your experience with PMOD signals and my experience with PMOD signals, I guess I have to drop Arty S7 as an option.