SMPS output impedance / PDN measurement

[oManabu]

I think I got successfully measured buck converters output impedande using W1-C1P-DUT-C1N-C2-R-GND topology in Impedance Analyzer function. But, because the output impedance is between output and ground, I connected DUT(buck converter output) and ReferenceR at the opposite position (i.e. W1-C2P-R-C2N-C1-DUT-GND). Is it ok? (I could measure with W1-C1-R-C2-DUT-GND topology,too. But W1-C1P-DUT-C1N-C2-R-GND topology gave me cleaner measurement.)

Also, there are a lot of documents which suggest to use VNA with shunt through method to measure PDN impedance. But all suggests to add common mode transformer to reject common mode noise from port1 to port2 at low frequency (<1MHz). I believe that measuring the impedance with Analog Discovery2 W1-C1P-DUT-C1N-C2-R-GND topology is nothing different from VNA with shunt through method but better in noize rejection. Am I correct that AD2 W1-C1P-DUT-C1N-C2-R-GND measurement takes over VNA shunt through measurement at low frequency?

Edited January 23, 2023 by oManabu