Power Sequence and Reset (PS_POR_B) for CORAZ7 - Zynq-7000

[SIE]

Hello,

I have a problem with a custom PCB we design around a Zynq-7000, the design was inspired by the CORAZ7 which we used for the FW development in the meantime.

Turn out that in our custom design PCB, the Zynq PS seems to stay in a reset state after loading the elf file from SDK.

Then we check the power + reset sequencing, as indicated on ug585 pag. 185, seems ok.

The oddity is that in the CORAZ7 the sequence turned out the opposite:

- The PS_SRST_B is not used (only with push button, by hand)

- The PS_POR_B is arriving nearly 90ms before the PS-PL power (see the oscilloscope picture in attach)

This seems to be the opposite of what the Xilinx documentation state.

 

But the CORAZ7 works in this way.

 

Could be the Xilinx documentation wrong? How can the CORAZ7 cope with this sequence? Or... just me, doing something odd.

I would truly appreciate some help here, thanks.

Ed