SIE

Hello, I'm working on a custom PCB with a Zynq XC7Z010, the harware to some extent has been copied from the ZyboZ7. I could produce the petalinux bootable image and access the OS via serial interface. I have problems in creating SPI drivers, unfortunately there is no bsp available for petalinux 2022.2 and I guess something is missing. Do you know if a bsp for Petalinux 2022.2 would be made available? Thank you, Ed -------------------------------- p.s. I follow the configurations steps to enable the SPI drivers in the petalinux Kernel: Cadence SPI controller, Xilinx SPI controller common module, Xilinx Zynq QSPI controller and User mode SPI device driver support are all enabled on the kernel configuration menu. I finally add in the system-user.dtsi the settings: &spi0 { is-decoded-cs = <0>; num-cs = <1>; status = "okay"; spidev@0x00 { compatible = "spidev"; spi-max-frequency = <1000000>; reg = <0>; }; }; SPI0 is enabled in the Zynq and for the corresponding MIO pins.

Hello, I was using a CORA-Z7 which came with a small TF card with a boot image of petalinux. I lost it. Would be great is someone could copy the contents in a place to share it. I would greatly appreciate! Thanks, Ed

Hello, I have a problem with a custom PCB we design around a Zynq-7000, the design was inspired by the CORAZ7 which we used for the FW development in the meantime. Turn out that in our custom design PCB, the Zynq PS seems to stay in a reset state after loading the elf file from SDK. Then we check the power + reset sequencing, as indicated on ug585 pag. 185, seems ok. The oddity is that in the CORAZ7 the sequence turned out the opposite: - The PS_SRST_B is not used (only with push button, by hand) - The PS_POR_B is arriving nearly 90ms before the PS-PL power (see the oscilloscope picture in attach) This seems to be the opposite of what the Xilinx documentation state. But the CORAZ7 works in this way. Could be the Xilinx documentation wrong? How can the CORAZ7 cope with this sequence? Or... just me, doing something odd. I would truly appreciate some help here, thanks. Ed

Hello, I connected the SPI pins from the Cora Z7 to a DAQ regulator and I would like to ask if someone has an example of PS based interface from Zynq. The Embedded code can be initially on terminal but I would then run it on petalinux. Thanks, Ed

Dear All, I started recently working with a Zynq and a couple of evaluation boards. I had VHDL experience before but I'm mostly a SW person. I'm looking forward to your help and hopefully I'll pay back my debt by helping others soon :) I wish you a nice day! Ed