I have a Nexys A7-100T, I have tried to use MB without DDR2 on it and just work perfectly.
When I push the reset button, it can just run the program again.
But this time I try to use MB with DDR2, I use SREC SPI Bootloader to load my program in to dram.
I can work, when I push the program button it could just load whole thing and run correctly.
But this time when I push the reset button, It just reprint something but not reload the bootloader again.
Example:
1st run:
SREC SPI Bootloader
FlashID=0x1 0x20 0x18
Loading SREC image from flash @ address: 003d0900
Bootloader: Processed (0x)00001007 S-records
Executing program starting at address: 00000000
Hello World
Successfully ran Hello World application
After push reset button:
?ran Hello Worl
the reset signal is like below:
reset btn -> MIG's sys_rst(Activate Low)
MIG's ui_clk_syn_rst -> rst_mig_7series_0_81M & rst_clk_wiz_0_200M & clk_wiz
↑All of them are Activate High
rst_mig_7series_0_81M's mb_reset -> Microblaze(Activate High)
rst_mig_7series_0_81M's peripheral_aresetn -> axi_smc & mig's aresetn
rst_clk_wiz_0_200M's peripheral_aresetn -> axi_uarlite & axi_quad_spi's s_axi_aresetn
The whole graph is like this
Did I just do something wrong?
Or the reset signal is just not work for design with ddr2?
Question
KBlueLeaf
I have a Nexys A7-100T, I have tried to use MB without DDR2 on it and just work perfectly.
When I push the reset button, it can just run the program again.
But this time I try to use MB with DDR2, I use SREC SPI Bootloader to load my program in to dram.
I can work, when I push the program button it could just load whole thing and run correctly.
But this time when I push the reset button, It just reprint something but not reload the bootloader again.
Example:
1st run:
SREC SPI Bootloader
FlashID=0x1 0x20 0x18
Loading SREC image from flash @ address: 003d0900
Bootloader: Processed (0x)00001007 S-records
Executing program starting at address: 00000000
Hello World
Successfully ran Hello World application
After push reset button:
?ran Hello Worl
the reset signal is like below:
reset btn -> MIG's sys_rst(Activate Low)
MIG's ui_clk_syn_rst -> rst_mig_7series_0_81M & rst_clk_wiz_0_200M & clk_wiz
↑All of them are Activate High
rst_mig_7series_0_81M's mb_reset -> Microblaze(Activate High)
rst_mig_7series_0_81M's peripheral_aresetn -> axi_smc & mig's aresetn
rst_clk_wiz_0_200M's peripheral_aresetn -> axi_uarlite & axi_quad_spi's s_axi_aresetn
The whole graph is like this
Did I just do something wrong?
Or the reset signal is just not work for design with ddr2?
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