ArtyA7-100 vs QSPI Flash S25FL127S

[Robert.o]

Hello,

I bought some week ago an ArtyA7 EVB and saw that there was a different QSPI flash above, the S25FL127S instead of S25FL128S.
Now, I'm playing a bit with the board to test some circuit and SW embedded just to test some ideas using Vivado 2021.2 and Vitis.
So no trouble at all with the board (very good piece of HW) and SW/IDE, using the board w/o the JP1 inserted and download directly into FPGA the bitstream and elf file.

Now I'm in a stable status and I've tried to put the .bit and .elf into QSPI... ah.. it's a nightmare!

I've studied all tutorial, event if explaining old version of Vivado with SDK instead of Vitis, and rebuild, hopefully, the right sequence to generate the different part of  .bit , boot-rec, srec, etc...  using Vitis, but it seem to me that the Vitis FlashProgram add-on is not able to recognize the S25FL127S Flash chip.

First of all Vitis tool doesn't have the S25FL127S option available into the menu, there are: S25FL128Sxxxxxx0 and S25FL128sxxxxxx1
but didn't help.

Below how I set the Flash Program window of Vitis:

 

and below the log after Program button:

--------------------------------------------------------------------------------------------------

cmd /C bootgen -arch fpga -image \
C:/ArchivioDati/XILINX/FUNC-GEN/VITIS/FuncGEN_system/_ide/flash/bootimage.bif -w -o \
C:/ArchivioDati/XILINX/FUNC-GEN/VITIS/FuncGEN_system/_ide/flash/BOOT.bin  -interface spi

****** Xilinx Bootgen v2021.2
  **** Build date : Oct 19 2021-03:13:27
    ** Copyright 1986-2021 Xilinx, Inc. All Rights Reserved.

[INFO]   : Bootimage generated successfully

cmd /C program_flash -f \
C:/ArchivioDati/XILINX/FUNC-GEN/VITIS/FuncGEN_system/_ide/flash/BOOT.bin -offset 0x0 \
-flash_type s25fl128sxxxxxx0-spi-x1_x2_x4 -verify -cable type xilinx_tcf url \
TCP:127.0.0.1:3121

****** Xilinx Program Flash
****** Program Flash v2021.2 (64-bit)
  **** SW Build 1967 on 2021-10-14-04:42:58
    ** Copyright 1986-2020 Xilinx, Inc. All Rights Reserved.

Connected to hw_server @ TCP:127.0.0.1:3121

ERROR: Given target do not exist

--------------------------------------------------------------------------------------------------

I've got the above situation with or without the JP0 inserted on ArtyA7 EVB.
Tried also to reset (PROG button) the EVB before pressing the Program button...  still same failure.
EVB is new and seems OK, it works well if i download directly into FPGA (JP0 unplugged).

 

Please could you help me to understand how set Vitis to program the QSPI Flash S25FL127S  ?

Tks in advance.

Br
  Roberto

 

 

[JColvin]

Hi @Robert.o,

The change you noted is due to supply constraints (of course); there's a little bit more detail about that in the Product Change Notice available on the Arty A7 Resource Center: https://digilent.com/reference/programmable-logic/arty-a7/start#documentation.

I'm not certain if there is a way to get Vitis to recognize the other flash memories. I am not certain how large your application is (and I have personally never gotten the SREC bootloader to work) would be to follow the instructions I put in this post (associating the .elf file of the application project with MicroBlaze) and then loading the .bin file to the flash from Vivado), the post was for the Cmod A7, but the steps are effectively the same and Vivado should recognize the memory just fine (though if going through the Getting Started with IPI guide, you would of course follow the "with DDR" version of course):

Let me know if you have any questions.

Thanks,
JColvin

[Robert.o]

Hi JColvin,

tks for so quick reply and suggestion, I'll try to follow the suggested topic and I'll report my results.

Thanks
Br

  Roberto

[Robert.o]

Hi JColvin,

I've followed the post you suggest me and they work!

In the other words it seems that Vitis "driver" is not able to download the Flash on ArtyA7-100 while the HW-Manager on Vivado does.
So the tricky is to find a preferred way to generate a download.bin file with inside both FPGA bitstream and the elf file with the SW,
in order to have the right file for HW-Manager.

Tks for hints and support.

Br

 Roberto