ADP3450 - Generate 20MHz pulse (clock) with API

[ManonH]

Hi,

I am trying to generate a 20MHz clock on a DIO with Analog Discovery Pro 3450, using the SDK.

I understand that I need to divide the internal clock frequency, and take into account the number of low and high states.
The problem is, if I divide 100MHz by 20MHz, I have a divider of 5. If I divide by 1 low state and 1 high state (so I divide by 2), that is 2.5. But the divider must be an integer, so it will adjust the divider and output the wrong frequency.
The same goes for the number of high and low states, as it has to be an integer, I can't play with them to get my 20MHz frequency.

But I see that in WaveForms I can set a clock with a 20MHz output, and that gives the correct frequency (as I saw on my scope).

Is there an explanation I didn't understand or something? 

 

Thank you for the help,

Manon.

 

Here is the relevant part of the script, if it helps: 

S_Clk = c_int(0)
frequency = 20000000
    dwf.FDwfDigitalOutInternalClockInfo(hdwf, byref(internal_clock_frequency))
    dwf.FDwfDigitalOutEnableSet(hdwf, S_Clk, True)
    dwf.FDwfDigitalOutTypeSet(hdwf, S_Clk, constants.DwfDigitalOutTypePulse)
    dwf.FDwfDigitalOutIdleSet(hdwf, S_Clk, constants.DwfDigitalOutIdleInit)
    dwf.FDwfDigitalOutDividerSet(hdwf, S_Clk, c_uint(int(internal_clock_frequency.value/frequency/2)))
    dwf.FDwfDigitalOutCounterSet(hdwf, S_Clk, c_uint(1), c_uint(1))

[attila]

Hi @ManonH

With 100MHz system frequency 20MHz can be generated but not with 50% duty, like with 3-2 timing 40% or 2-3 60% duty.
dwf.FDwfDigitalOutDividerSet(hdwf, S_Clk, c_uint(1)) # 100MHz default
dwf.FDwfDigitalOutCounterSet(hdwf, S_Clk, c_uint(3), c_uint(2)) # 100M/(3+2) = 20MHz low/high 3/2 40%

With ADP3X50 or Digital Discovery (and future products) the system frequency can be adjusted.
dwf.FDwfDeviceParamSet(hdwf, DwfParamFrequency, c_int(80000000)) # 80MHz 
and with this or 120MHz, 20MHz with 50% can be generated.
dwf.FDwfDigitalOutDividerSet(hdwf, S_Clk, c_uint(1)) 
dwf.FDwfDigitalOutCounterSet(hdwf, S_Clk, c_uint(2), c_uint(2)) # 80M/(2+2) = 20MHz low/high 2/2 50%

[ManonH]

Hi @attila

 

Thank you for the response. I need a duty of 50% so this won't be possible at 100MHz but i'll check for 80MHz or multiple.