I am working on a project which requires DDR access through PL (i.e, no PS is part of the project) targeted on Zybo Z7-20 FPGA SoC board. As a part of this implementation, I was looking out for Xilinx MIG wizard settings specific to this board. I couldn't find this information anywhere in the Zybo Z7-20 Technical Reference Manual. I went through the datasheet of DDR component available on this board (i.e., MT41K256M16HA-125) but it's very difficult to search for the information required by Xilinx MIG Generator IP.
Could anyone please help me out with the suitable resources for this..?
The Arty FPGA board Technical Reference Manual clearly specifies the MIG wizard settings. I am exactly looking for the same information for Zybo Z7-20.
Question
Hitman45
Hi there,
I am working on a project which requires DDR access through PL (i.e, no PS is part of the project) targeted on Zybo Z7-20 FPGA SoC board. As a part of this implementation, I was looking out for Xilinx MIG wizard settings specific to this board. I couldn't find this information anywhere in the Zybo Z7-20 Technical Reference Manual. I went through the datasheet of DDR component available on this board (i.e., MT41K256M16HA-125) but it's very difficult to search for the information required by Xilinx MIG Generator IP.
Could anyone please help me out with the suitable resources for this..?
The Arty FPGA board Technical Reference Manual clearly specifies the MIG wizard settings. I am exactly looking for the same information for Zybo Z7-20.
Any help in this regard is extremely appreciated!
Thanks.
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