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HSWAPEN pin in spartan 6 FPGA


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Hi,  I have seen that the I/O pins in a spartan 6 development board go high momentarily during power ON. And then they go low.

This maybe during the configuration, that is, code getting loaded from Flash FROM to FPGA. Can anyone tell me how to keep the

I/O's low during Power ON? Maybe it has something to do with HSWAPEN pin.


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