I am trying to develop a project with ARTY z7-board. The idea is to write the data from the HDMI input in the DDR memory as is done in the example. Then i want to project this data in a Lissajous pattern. The problem here is that since i have to shot as Lissajous pattern, i have to process the address and read the information pixel by pixel. I implemented an axi master that reads from the DDR memory using the HP0 slave from zynq. The problem is that the reading latency is really really high (around 40 samples of the ILA), which is connected to the AXI clock of 100MHz. Do you know how can i optimize this reading latency? I tried with the advanced options of the DDR in the GUI, but if I activate the HPR option for this channel but this blocks my reading channel, i assert the read with arvalid and arready, but the data never comes back.
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angeljd
Hi guys,
I am trying to develop a project with ARTY z7-board. The idea is to write the data from the HDMI input in the DDR memory as is done in the example. Then i want to project this data in a Lissajous pattern. The problem here is that since i have to shot as Lissajous pattern, i have to process the address and read the information pixel by pixel. I implemented an axi master that reads from the DDR memory using the HP0 slave from zynq. The problem is that the reading latency is really really high (around 40 samples of the ILA), which is connected to the AXI clock of 100MHz. Do you know how can i optimize this reading latency? I tried with the advanced options of the DDR in the GUI, but if I activate the HPR option for this channel but this blocks my reading channel, i assert the read with arvalid and arready, but the data never comes back.
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