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ARTY S7-50 reset signal toggling


Ryno

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Hi,

I noticed some strange behaviour while trying to make a risc-v core run on the arty. When doing a power-on, the reset line will toggle over a period of about 4 seconds. I noticed something strange so decided to connect a logic analyser to the breakout pin for the reset line on jumper "J8" and got the following trace. I get the exact same behaviour every single time, it's not random. I looked at the schematic and cannot see the CK_RST line being connected to anything other than the FPGA that might explain this behaviour. It seems that the last 6 occurrences of the reset line being pulled low are 650ms apart. The trace directly below is the VCC3V3 line on jumper "J8" which I probed to eliminate any issues with the power supply, as the CK_RST line is being pulled up by this rail through a 10K resistor, as the trace show the power is stable. Why is this happening?

 

545148550_CK_RSTbehaviouronpowerup.thumb.png.2880f6fbae63f1c3e077f3401df6012a.png

Edited by Ryno
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I found the answer, feel a bit silly, its in the manual...

"The CK_RST signal (see the Arty S7 Schematic) is also connected to the FT2232HQ device via JP2. When JP2 is shorted, the FT2232HQ can trigger a Microblaze reset, mimicking the behavior of Arduino and chipKIT boards when sketches are loaded. Note the CK_RST signal is also connected to the red RESET button and the RST pin of J7 on the shield connector (these connections are not shown in Figure 6.1). It is recommended that this jumper is not shorted unless attempting to run Arduino IDE on Microblaze, because it can interfere with normal Microblaze function."

The connections between the FT2232HQ and the Spartan-7 are shown in Figure 6.1.

arty-s7-uart.png

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