Low HS2 2-Wire JTAG throughput due to gaps in TCLK

[AkhilMK]

Hello,

I'm using DJTG Apis to communicate over 2-Wire JTAG. Major implementation makes use of the below API.

DjtgPutTmsTdiBits(HIF hif, BYTE * rgbSnd, BYTE * rgbRcv, DWORD cbitpairs, BOOL fOverlap)

Could you please comment on the following observations.

1. TCLK time period/frequency varies a lot.
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2. There are gaps in between TCLK chunks and it reduces the throughput.
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Any resolution or help on this is highly appreciated.

Thanks, Akhil

 

[zygot]

I don't see anything unexpected. You were expecting un-interrupted data transfer over USB on a PC host?