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Interesting Reddit thread

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And perhaps some of the Digilent readers have been thinking that I'm the lone, eccentric odd whining voice in the wind? I've been using programmable logic from before the FPGA era. I've used devices, tools, and HDL languages from companies long since gone. The perspective of historical contrext shouldn't be ignored.

So, I read the posts to the reddit thread and didn't see much new. I'm not sure what the intent of the thread moderator is but one thing is for sure... Xilinx can't blame anyone for it's slide into the black hole of tool dysfunction on anyone other than it's own management. What should anyone expect from a compressed 60+ MB ( and growing ) amalgam of semi-integrated collection of executables, scripts and IP that get tinkered with 2-3 time a year. At some point no one, not even the clowns, are running the circus. It just doesn't have to be this way. Frankly, I'd be a lot more interested in hearing what Xilinx engineers think about what's happened to their product and franchise. Not the tools necessarily because I believe that responsibility for that was long ago off-shored to subcontractors.

My only hope now is that AMD won't make Xilinx FPGAs a game just for a few top companies and abandon the little guys. As Intel and Xilinx chase the high end market there's real concern for anyone hoping to be in the programmable device business and not part of a mega-corporation.

Oops, I'm guessing that @JColvinwas expecting me to press my many grievances on Reddit. 

Well, entropy is a well known phenomenon, so I'll just keep trying to get stuff done with older versions of the tools until the PCs that they are installed on no longer work and if the older, less odious, versions of the tools are available and work with newer OSes.

Incidentally, I've been using ISE lately because of bizarre Vivado PCIe tool issues and it's a revelation. I remember now why I resisted using Vivado for so long when it came out. It's all about getting work done in a timely manner with minimum time spent trying to work around tool bugs, mindless syntax changes, and disappointing results. There never was a great time for programmable logic tools ( though Quartus was noticeably less annoying for a period years ago ) but things have gotten ridiculous to the point of being worthy of a horror movie. 

BTW, the link as posted above didn't work for me but I was able to copy it and get my browser to see the thread discussion. No surprise to see @D@nrepresented there... keep on truckin' Dan...

Edited by zygot
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No, I didn't expect you to post your grievances on Reddit; my only goal was make it so that you (and other curious readers who scroll far enough down on the Forum) were aware of that thread much like it was brought to my attention earlier today, nothing more. What you or anybody else chooses to do with their time and effort is their own choice; there's enough things in life to nit-pick so that not everything deserves having a thought dedicated towards it. But maybe that's just me.

I agree with your sentiment on wanting to know what Xilinx engineers think has happened to their software product, though I think both entropy and feature creep have lead to the tool bloating that was mentioned on the initial post. But I've only ever used Vivado so my perspective is limited and not terribly helpful.

I was able to regular left-click on the post and have it take me to the thread, though to my surprise, right clicking did not work; I added a url link for better convenience.

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I'm not a fan of the standard social media platforms so I have no plans on signing up to add content to one; but it is interesting to get a sense of the frustration out there among those who do and have to use FPGA devices to make a living.

1 hour ago, JColvin said:

But I've only ever used Vivado so my perspective is limited and not terribly helpful.

But you've used Vivado. Many many versions of Vivado. So your perspective is useful though perhaps you aren't in a position to speak freely.

When the device vendors are unresponsive to, or incapable of addressing customer issues with their tools then the customers are left to fend for themselves. I don't think that the Digilent forums are the place to do this, except as it relates to Digilent products, but I'm not sure where this might take place. Even for seasoned developers it's hard to navigate the swamp alone.

If you want to see frustration you just need to go to the official Xilinx Community Forums. Personally, I haven't found that site very useful in terms of getting information or answers to mysteries that I encounter. It's so vast that I can't even find my own posts in a reasonable amount of time.

Managing complexity takes commitment... and investment.

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One of the things you may be missing about that thread is that the OP is a senior engineer at Xilinx.

Perhaps that might adjust your sense of how you read it.  Personally, I view the conversation as a very valuable one, and I'm glad to see it taking place.


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5 hours ago, D@n said:

One of the things you may be missing about that thread is that the OP is a senior engineer at Xilinx.

Well, I did suspect that he (I'm guessing ) was a Xilinx engineer. But he has one opinion, and likely a defensive one. I'm curious as to the pulse of the many working engineers there.

Of course the opinion of an engineer working on a product is going to be different than that of customer of that product who has to use it to make a living while fending off ancillary pressures and deadlines. I've been in both situations.

I can't disagree though that some useful communication between producers and users might not be a good thing.  I've conditioned that statement because engineers, even senior engineers rarely have a say in where their ship is sailing to; even when everyone knows that their opinions might be correct.

Still, if customers don't try and communicate untenable situations to their vendors then they can only blame themselves for their predicament. Competition is, in theory, supposed to resolve these kinds of problems; but competition, unfortunately, is a passe notion at the moment. 

I'm hoping that someone like you, who might earn a bit of respect, at least to the point of spurring FPGA vendors into trying to engage the user community honestly will bear some fruit. My fear is that it's too late and they no longer have the ability to control the beasts that they've created. Perhaps the decision makers at Xilinx aren't even steering the ship at this point.

According to recent media articles Intel has had a vision and claims that it can reconstruct the old days when technical and production prowess was a thing for them. I'm a skeptic..  but what alternative do I have but to hope for the unlikely scenario that they will make good on this pledge.

Given the headaches trying to use the current ZYNQ tools can anyone really believe that devices with a 'sea of processor complexes', tons of embedded memory and scattered logic complexes can be supported by the tool designers? Can you see a straight line between here and there? I can't. But who has the time? I expend most of my energy trying get around new bugs that get in the way of all-HDL designs.

My WIn10 box has ISE 14.7. I installed it from a DVD. I installed a Linux version of ISE onto a separate HD. The last Vivado download to do ZYNQ development was over 60 GB. There isn't a lot of VHDL or Verilog functionality that ISE couldn't do. While Vivado has added a few feature support for later HDL incarnations it seem to be worse in terms of getting work done. This isn't my idea of progress.

You'll have to point out what it is about the Reddit thread that has you upbeat. All I noticed, in connection to AXI IP, was the assertion that Xilinx gave ARM the bus specification and design.... who cares who fathered a bus specification? That doesn't prove competency. All that Vivado users care about is that whatever Xilinx peddles works... period. Well, that about sums up my current feelings on the topic.

It seems to me that the GUI flow is a huge problem in terms of release to release continuity. Big FPGA user companies don't use the GUI tools. But then they have dozens or hundreds of engineers writing Perl and TCL scripts... all as support for designers and verification engineers who rarely do both. Perhaps you can guide them to the shore. Are they willing to abandon the board design flow and get back to supporting something that the users need? Something that allows any size company to develop products in a maintainable way over time?

I try wading through the Xilinx Community Forum posts from time to time. Do you think that this senior engineer spends much time doing that?

Of course the context of the Reddit thread in question is something that I'm not privy to. Obviously, there been some interaction bewteen you and the OP. No one can really understand anything without context.

Edited by zygot
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  • 1 month later...
On 8/15/2021 at 12:47 PM, zygot said:

You'll have to point out what it is about the Reddit thread that has you upbeat.

@D@ndoesn't seem to be inclined to respond to this question. Perhaps Dan personally, has developed a relationship with some one at Xilinx , but what exactly can he point to as a concrete example of something that has been corrected?

After close to 30 years of using Xilinx tools I can write more than anyone would care to read about why I don't see  a Reddit post as very worthwhile. But to save time I'll just present a recent experience.

I was, for a couple of weeks, trying to get Vivado to use the correct PCIe MGT resources for a board the Digilent sells. No help from Digilent. I posted the question to the Xilinx Community Forum. I got a few replies that didn't provide usable answers, but one individual did post a few replies. I suspect that he was a Xilinx employee because all of his comments were useless but put a positive light on the tools. Eventually, I managed to resolve the issue on my own, after a lot of frustrating interactions with the few people who posted to the thread. I got a 'kudos" from the individual who I suspect works for Xilinx for posting that I found a way to get around a really stupid and unnecessary problem with the Vivado IP. 

Now it's been a few weeks since and none of the links to this particular post in emails sent to me from Xilinx work. I can't even find my own post scrolling through those posted to the forum. In fact, the only way to find it is to search for the exact title of the post. So this creates the impression that there's some scrubbing going on to make Xilinx look better than it should... or at least present posts that do for anyone searching for answers. This experience is quite consistent with all of the previous ones that I've had using the Xilinx Community Forums. One thing that has never happened is that valid issues that I've presented have ever been addressed or fixed. Basically, the suggestion is that the tools are going to do whatever they are going to do and the customer's time and project deadline doesn't matter.

Viewpoints are certainly dependent on experience, or perhaps just hopeful optimism.

So really, my question was in good faith. Tell me something that might offset most of my past experiences that drive my viewpoint.

Edited by zygot
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