I am building a simple video pipeline using petalinux 2019.1.
The following is my design :
Camera -> MIPI-CSI-RX-Subysystem -> Demosaic -> Videoframe buffer write -> Video Frame buffer read -> ZYNQ-PS.
When the clock frequency for the pipeline is 15MHz it can detect the media device but it fails to save the images and gives broken pipe error
please find attached device tree. However when I include the framebuf-rd in the device tree the booting freezes (I have attached the screenshot from the log file when it does freeze)
&v_frmbuf_rd_0 {
reset-gpios = <&gpio0 55 GPIO_ACTIVE_LOW>;
};
Following are my questions
1. Is 15MHz sufficient for the pipeline
When I change it to 150MHz it fails to detect the media device
2. What should I change in my device tree or design ?
Question
Gumesh
Hi,
I am building a simple video pipeline using petalinux 2019.1.
The following is my design :
Camera -> MIPI-CSI-RX-Subysystem -> Demosaic -> Videoframe buffer write -> Video Frame buffer read -> ZYNQ-PS.
When the clock frequency for the pipeline is 15MHz it can detect the media device but it fails to save the images and gives broken pipe error
please find attached device tree. However when I include the framebuf-rd in the device tree the booting freezes (I have attached the screenshot from the log file when it does freeze)
&v_frmbuf_rd_0 {
reset-gpios = <&gpio0 55 GPIO_ACTIVE_LOW>;
};
Following are my questions
1. Is 15MHz sufficient for the pipeline
When I change it to 150MHz it fails to detect the media device
2. What should I change in my device tree or design ?
Thanks in advance!
system-userdtsi.txt.txt pldtsi.txt design_1 (1).pdf
Link to comment
Share on other sites
0 answers to this question
Recommended Posts
Archived
This topic is now archived and is closed to further replies.