Arty A7-RiscV-Murax Soc-Xilinx Virtual cable

[Pradeep]

Hello everyone,

I want to upload and debug software in the riscv core which uses a murax soc without using physical jtag adapter, but maybe by using some IPs and Xilinx Virtual Cable on my arty a7-100 artix 7 FPGA board

Are there any documentations regarding the same?

Thank you

[JColvin]

Hi @Pradeep,

Digilent does not have any materials regarding the use a murax soc. Otherwise it looks like we have some material on using a RISC-V with an Arty A7 here, otherwise there might be some additional information on a murax soc here.

Thanks,
JColvin

[Pradeep]

Hi @JColvin

I am not able to detect my arty a7 board on Xilinx hardware manager. The required drivers are installed and tried changing USB cables and different ports on my computer, but still its not detecting. Please help me out in this.

Thank You