I have some RTL to generate square waves and output them to the AMP3, but I am getting some interesting distortion. For my test, I generate square waves for ascending notes from C3 (130.8Hz) to B5 (987.799Hz), and repeat. The lowest 14 notes sound horribly distorted, the middle octave notes sound OK, while the highest notes have some really weird super low pitch harmonics I can hear. I'm almost 99% sure this is a stupid RTL bug, but I want to check my assumptions first
assumption 0: class D amplifiers can work with my headphones. I did see this interesting thread
claiming that a class D amplifier can't be used to directly drive headphones, but I'm not sure if this is really a limitation. All I have is my Sony WH-1000XM3s to test, so I can't really make a comparison
assumption 1: my weird clocking is kinda ok. I'm using the vivado clocking wizard to take in a 250MHz clock and generate a MCLK of 6.144MHz (but really 6.14401), giving me a sample rate of 24000.0390625. I both directly pass the generated MCLK to the AMP3, and I also use it to drive all my logic. Then, I have a single counter that I use to divide MCLK into bit clock (768KHz, MCLK/256) and LR clock (MCLK/256/32 == 24KHz == sample rate). Bit clock and LR clocks aren't used to drive logic, but rather just passed to the AMP3 directly. Think:
// sample rate is mclk/256. log2(256)=7, so we need an 8 bit counter, and use bit 7
localparam kClockDivCntMsb = $clog2(kMclkSampleFreqMul /2);// if MCLK is 256 x LRCLK, and BCLK is 32 x LRCLK, then BCLK is 8 x MCLK
localparam kClockDivCntBclkBit = $clog2(kMclkSampleFreqMul /(kBitsPerCh * kNumCh))-1;// so close. We want 6.144MHz but get 6.14401. Giving us a sample rate of 24000.0390625// MCLK is fed to the AMP3 MCLK pin, and also drives my logic
logic MCLK;
audio_clock_gen clock_gen
(.clk_in_250MHz(clock_250MHz),.mclk_out(MCLK));// generate LRCLK and BCLK, these are fed to the AMP3 and not used to drive logic
logic [kClockDivCntMsb:0] clock_div_ctr =0;`AUDIO_MARK_DEBUG logic LRCLK;`AUDIO_MARK_DEBUG logic BCLK;
assign LRCLK = clock_div_ctr[kClockDivCntMsb];
assign BCLK = clock_div_ctr[kClockDivCntBclkBit];
assumption 2: there is nothing special I have to do with the constraints. I'm assuming it's OK to just use the Arty A7 slow PMOD ports, and use IO standard LVCMOS33
# update: can't use TMDS with JA. This must be JB. Using JA for audio instead
set_property -dict {PACKAGE_PIN G13 IOSTANDARD LVCMOS33}[get_ports audio_lrclk]
set_property -dict {PACKAGE_PIN B11 IOSTANDARD LVCMOS33}[get_ports audio_data]
set_property -dict {PACKAGE_PIN A11 IOSTANDARD LVCMOS33}[get_ports audio_nc0]
set_property -dict {PACKAGE_PIN D12 IOSTANDARD LVCMOS33}[get_ports audio_bclk]
set_property -dict {PACKAGE_PIN D13 IOSTANDARD LVCMOS33}[get_ports audio_nc1]
set_property -dict {PACKAGE_PIN B18 IOSTANDARD LVCMOS33}[get_ports audio_nc2]
set_property -dict {PACKAGE_PIN A18 IOSTANDARD LVCMOS33}[get_ports audio_mclk_e]
set_property -dict {PACKAGE_PIN K16 IOSTANDARD LVCMOS33}[get_ports audio_shutdown]
assumption 3: there is no short in my AMP3. I tried wiggling it around a bit and making sure everything is securely connected, but it didn't fix the problem. Interestingly enough, I can reproduce something very close to the distortion by pulling my headphone cable out just enough so that the audio comes out in stereo instead of mono
So if those three assumptions are solid, I can move on to finding whatever RTL bug I have. Although, I have noticed that the Sony headphones seem to have a mic, and any talking I do into the mic causes normally clean notes to sound distorted, so maybe there is something there
Question
okonomiyonda
I have some RTL to generate square waves and output them to the AMP3, but I am getting some interesting distortion. For my test, I generate square waves for ascending notes from C3 (130.8Hz) to B5 (987.799Hz), and repeat. The lowest 14 notes sound horribly distorted, the middle octave notes sound OK, while the highest notes have some really weird super low pitch harmonics I can hear. I'm almost 99% sure this is a stupid RTL bug, but I want to check my assumptions first
assumption 0: class D amplifiers can work with my headphones. I did see this interesting thread
claiming that a class D amplifier can't be used to directly drive headphones, but I'm not sure if this is really a limitation. All I have is my Sony WH-1000XM3s to test, so I can't really make a comparison
assumption 1: my weird clocking is kinda ok. I'm using the vivado clocking wizard to take in a 250MHz clock and generate a MCLK of 6.144MHz (but really 6.14401), giving me a sample rate of 24000.0390625. I both directly pass the generated MCLK to the AMP3, and I also use it to drive all my logic. Then, I have a single counter that I use to divide MCLK into bit clock (768KHz, MCLK/256) and LR clock (MCLK/256/32 == 24KHz == sample rate). Bit clock and LR clocks aren't used to drive logic, but rather just passed to the AMP3 directly. Think:
assumption 2: there is nothing special I have to do with the constraints. I'm assuming it's OK to just use the Arty A7 slow PMOD ports, and use IO standard LVCMOS33
assumption 3: there is no short in my AMP3. I tried wiggling it around a bit and making sure everything is securely connected, but it didn't fix the problem. Interestingly enough, I can reproduce something very close to the distortion by pulling my headphone cable out just enough so that the audio comes out in stereo instead of mono
So if those three assumptions are solid, I can move on to finding whatever RTL bug I have. Although, I have noticed that the Sony headphones seem to have a mic, and any talking I do into the mic causes normally clean notes to sound distorted, so maybe there is something there
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