read and write into DDR3 ram MicroBlaze

[thespartacus98]

hello,

i'm new in the FPGA's world and i need help.

i want to write into my Genesys2 DDR3 ram a text file(sent using TeraTerm) with 200002 number at 5 digit using SDK then programming with C language but i don't know how write the program. i'm using a simple while with scanf and printf for try to print 60 numbers but only the first is correct, others are like -21xxxx . I used the block design used for the "hello world" guide in Vivado 2016.4.

can you help me in some way?

[zygot]

6 hours ago, thespartacus98 said:

i want to write into my Genesys2 DDR3 ram a text file(sent using TeraTerm) with 200002 number at 5 digit using SDK then programming with C language but i don't know how write the program.

Perhaps, this reply will be a bit tangential to your question but I can't resist.

This is a problem with Intel and Xilinx design tools like Qsys and Board design. They have a relatively easy to use drag and drop GUI 'board design' input method that lets you use most of the hardware on your board... but only if you want to use their proprietary soft processor, NIOS or MicroBlaze, and only with limited functionality. If you want to do something that isn't provided then you are out of luck. Even more unfortunate is that the close development board partners like Terasic or Digilent are forced to support that design approach.

The Genesys2 is a very nice FPGA development board. I've done dozens of designs for it and none uses the board design IP, AXI buses, or a MicroBlaze. More than a few use the DDR external memory. There aren't many FPGA board vendors who help their customers use the hardware that they sell, like DDR, Ethernet, HDMI, etc unless the customer is willing to be jailed in the walled garden of Qsys and the board design source flow. But, the cost isn't just wasted resources, the user has to then go though the added labor of using the software development tools.

It is quite possible to read and write to the DDR on the Genesys2 though TeraTerm or Putty with a totally HDL source flow design. There just aren't too many board vendors willing to help their customers do it by providing standalone DDR demo projects and the like.  Worse, the same vendors can't help when the demos that they do provide stop working with new versions of the tools because it's too hard to keep up. That's one of the costs of living in a walled garden....

The SDK does provide example projects with code if you are using the standalone Xilinx OS. There are numerous examples for using a UART. I can't talk about MicroBlaze because I don't use it but I do use the SDK for ZYNQ designs.

The SDK is a big scary place but before trying to do something important with it you should take some time and play around in it to see what's available and how it works.