Vishnuk Posted March 6, 2020 Share Posted March 6, 2020 hi, Can somebody tell me how to use uart and fifo ipcore together using vivado for basys 3 board. i want to receive data thru uart and then write into memory. once memory full it should read out the memory through uart Link to comment Share on other sites More sharing options...
Ana-Maria Balas Posted March 9, 2020 Share Posted March 9, 2020 Hello @Vishnuk, You can use FIFO Generator IP and AXI UART LITE IP. Please read the documentation of the IPs for more details. You can connect the RX to the input of the FIFO and TX to the output of the FIFO. Use the FIFO in Native Interface. Link to comment Share on other sites More sharing options...
Vishnuk Posted March 10, 2020 Author Share Posted March 10, 2020 On 3/9/2020 at 2:42 PM, Ana-Maria Balas said: Hello @Vishnuk, You can use FIFO Generator IP and AXI UART LITE IP. Please read the documentation of the IPs for more details. You can connect the RX to the input of the FIFO and TX to the output of the FIFO. Use the FIFO in Native Interface. hi actually i am new to this fpga, i dont understan how to instantiate. Can u tell me if i want to do uart echo how do i do it in vhdl ip core Link to comment Share on other sites More sharing options...
D@n Posted March 10, 2020 Share Posted March 10, 2020 @Vishnuk Here's a tutorial that discusses how to build both UARTs and FIFOs. Dan Link to comment Share on other sites More sharing options...
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Vishnuk
hi,
Can somebody tell me how to use uart and fifo ipcore together using vivado for basys 3 board. i want to receive data thru uart and then write into memory. once memory full it should read out the memory through uart
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