gxabc_123 Posted February 6, 2020 Share Posted February 6, 2020 Hey guys, I am looking for a tutorial to implement the QSPI to my Zybo Z7-20 board. Are there any examples/tutorials existing, that I can look for? greetings, gregor_ Link to comment Share on other sites More sharing options...
gxabc_123 Posted February 12, 2020 Author Share Posted February 12, 2020 Thanks a lot @Ana-Maria Balas Link to comment Share on other sites More sharing options...
Ana-Maria Balas Posted March 4, 2020 Share Posted March 4, 2020 At first I understood that you saw this name somewhere in other design and i thought in the begging that is Slave select. I searched in the AXI QUAD SPI IP manual. The SPI_0_0_spisel is and input ACTIVE LOW port and it must be configured only if you don't enable Master Mode when configuring the IP. If you look in the manual of the AXI QUAD SPI IP, at page 21 and page 41, it says that you have to put this input in LOW logic for standard SPI slave mode. So connect the input to a constant with value 0. But if you Enable Master Mode, then automatically this input is set to HIGH logic and you don't have to set it. The project was made with the Enable Master Mode set, and that is why it doesn't appear in the constrain file and for us worked very well, because we didn't have other slaves. Link to comment Share on other sites More sharing options...
gxabc_123 Posted March 4, 2020 Author Share Posted March 4, 2020 Of course: It is all about the QSPI block. My block SPI is a emulator for testing my counter interface. Here is the AXI Quad SPI Configuration: The builded port wrapper is: And my constraints are If I make here any changes (let signal ports away), I get errors in the bitstream. Link to comment Share on other sites More sharing options...
Ana-Maria Balas Posted March 4, 2020 Share Posted March 4, 2020 Can you post a picture of your block design here? Link to comment Share on other sites More sharing options...
gxabc_123 Posted March 4, 2020 Author Share Posted March 4, 2020 So do I use SPI_0_0_spisel instead of SPI_0_0_ss_io? Because, if I do not declare SPI_0_0_spisel in my constraints I get some errors. Also if I replace SPI_0_0_ss_io through SPI_0_0_spisel. Also in this overview https://reference.digilentinc.com/learn/fundamentals/communication-protocols/spi/start there is nothing said about SPI_0_0_spisel. or is it not important which of the two pins I wire later? do I only have to declare both pins? Link to comment Share on other sites More sharing options...
Ana-Maria Balas Posted March 4, 2020 Share Posted March 4, 2020 SPI_0_0_spisel is just a name for SPI slave select or SPI chip select. It's the same thing. Link to comment Share on other sites More sharing options...
gxabc_123 Posted March 4, 2020 Author Share Posted March 4, 2020 Yeah, I disabled Master Mode, because my device should only run in slave mode. For me is now unclear, what is the function of this SPI_0_0_spisel port? Will it replace my chip select pin? Link to comment Share on other sites More sharing options...
Ana-Maria Balas Posted March 4, 2020 Share Posted March 4, 2020 SPI slave select is used in case you have multiple SPI devices, but the project was made only for an SPI device and that's why it doesn't appear in the constrain file. Link to comment Share on other sites More sharing options...
gxabc_123 Posted March 4, 2020 Author Share Posted March 4, 2020 Hi @Ana-Maria Balas the constraits need one more signal "SPI_0_0_spisel". For what do I need this signal? SPI only needs for signal cables (CS, CLK; MOSI, MISO). Link to comment Share on other sites More sharing options...
Ana-Maria Balas Posted February 12, 2020 Share Posted February 12, 2020 Thank you! Link to comment Share on other sites More sharing options...
Ana-Maria Balas Posted February 12, 2020 Share Posted February 12, 2020 spi_rtl_io0_io -> MOSI spi_rtl_io1_io -> MISO Link to comment Share on other sites More sharing options...
gxabc_123 Posted February 12, 2020 Author Share Posted February 12, 2020 Hi @Ana-Maria Balas I have one more question. The constraint file says that there are spi_rtl_io0_io and spi_rtl_io1_io as MOSI and MISO existing. How do I find out, if spi_rtl_io0_io is MOSI or MISO? Link to comment Share on other sites More sharing options...
Ana-Maria Balas Posted February 11, 2020 Share Posted February 11, 2020 I'm glad that I could help you. Best regards, Ana-Maria Link to comment Share on other sites More sharing options...
gxabc_123 Posted February 11, 2020 Author Share Posted February 11, 2020 Hi @Ana-Maria Balas, thanks for your help! This was helping a lot. I was looking for a HW example like this. greetings, Link to comment Share on other sites More sharing options...
Ana-Maria Balas Posted February 7, 2020 Share Posted February 7, 2020 First you will need to make some research about SPI protocol. Some info here. In this location is a SPI project example for Vivado 2019.1. Follow the steps from this tutorial with additional instruction below: 1. Download the ZIP. 2. Open the Project -> steps from Vivado section 3. Generate Bitstream without 3.2) step 4. Import SDK Project -> steps from Launch from Vivado section without 4.5), 4.6), 4.7), 4.8) 5. In SDK: File-> New-> Application Project 6.Give it a name to your application and create new .bsp 7. In the .bsp folder double click the system.mss file and Import Examples Link to comment Share on other sites More sharing options...
gxabc_123 Posted February 7, 2020 Author Share Posted February 7, 2020 Hi @Ana-Maria Balas absolutly that what you said Link to comment Share on other sites More sharing options...
Ana-Maria Balas Posted February 7, 2020 Share Posted February 7, 2020 Hello @gregor_, What do you mean with "outside"? Do you want to send/receive data to/from a device connected to the Zybo Z7-20 board through the SPI protocol ? Link to comment Share on other sites More sharing options...
gxabc_123 Posted February 7, 2020 Author Share Posted February 7, 2020 I would like to send some float variable bare-metal to the outside but also receive float variable I am very open for further realisation variations Link to comment Share on other sites More sharing options...
xc6lx45 Posted February 6, 2020 Share Posted February 6, 2020 You might get more responses if you ask your question more precisely. What is it you want to achieve? Build a self-contained design that starts at powerup via the "FSBL" first-stage boot loader? Use the flash memory from the ARM core, possibly running code from it (see "execute-in-place" XIP)? Use the memory as bare-metal SPI component? Or something else? Link to comment Share on other sites More sharing options...
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gxabc_123
Hey guys,
I am looking for a tutorial to implement the QSPI to my Zybo Z7-20 board.
Are there any examples/tutorials existing, that I can look for?
greetings, gregor_
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