Time interval measurement between two pulses

[Taebong]

I am a beginner of FPGA of digilent. (I have a little experience in SRIO of NI.)  I would like to measure the time interval between two pulses with 2.5 nsec resolution. The clock of Artix-7 FPGA board on data sheet is 450 MHz(about 2.2 ns). Can I measure the time interval between two pulses with 2.5 nsec resolution using Artix-7 FPGA board?

[xc6lx45]

Hi,

generating the frequency is not the problem: The FPGA has PLLs of its own, the board clock frequency does not directly matter for this question.

However, designing at 450 MHz will be a specialist job, most likely using a "SERDES" IO block at the input (there is dedicated hardware that eats up e.g. 8 bits at high frequency, and the downstream logic can run at 1/8 the fast rate). I don't think a straightforward counter would work (speed of carry chain). Alternatives might be shift-register based or one-hot FSM (this just from the top of my head).

You'll find that FPGA tools require patience under the best of circumstances. Pushing performance to the limit can make design iterations very slow.

And, you may have better luck with a Spartan 7 (e.g. CMOD S7 board) than an Artix (e.g. CMOD A7 board). Kintex and Virtex should make this job easier but double-check the required tool licenses. You don't need to own the board to synthesize a test design and get the timing report (e.g. with a 30-day eval version).

[Taebong]

Thanks a lot.