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BASYS3 board - XADC ports


donwazonesko

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Hello @donwazonesko,

Please check this document : https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf for more info.

"- what's the sampling rate (i think its 1 Mpsp)?"

The sampling rate is indeed 1 MSPS. 

"- what's the delay between ports ?"

Can you please be more specific ?. Are you referring to the delay between conversions ? If yes, 26 ADCCLK cycles are required to acquire an analog signal and perform a conversion. This implies a maximum ADCCLK frequency of 26 MHz.

"- is it compatible with microphone output (diff or single ended)?"

Probably yes. But you have to make sure that the microphone output doesn't exceeds 500 mV for bipolar mode and 1 V for unipolar mode :)

For more info, please check this document : https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf.

Best Regards,

Bogdan Vanca 

 

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