I'm following the instructions from the readme file of the project, and PetaLinux build finished successfully (or at least it doesn't show any errors or warnings). The project is checked out as is, without any modifications.
However, trying to boot the board using the generated files results in the boot process hanging infinitely (see the log below). Any ideas what could go wrong?
0
Device: sdhci@e0100000
Manufacturer ID: 1b
OEM: 534d
Name: GD4QT
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 119.3 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
reading image.ub
54599132 bytes read in 4545 ms (11.5 MiB/s)
## Loading kernel from FIT Image at 10000000 ...
Using 'conf@1' configuration
Verifying Hash Integrity ... OK
Trying 'kernel@0' kernel subimage
Description: Linux Kernel
Type: Kernel Image
Compression: uncompressed
Data Start: 0x100000d4
Data Size: 3667136 Bytes = 3.5 MiB
Architecture: ARM
OS: Linux
Load Address: 0x00008000
Entry Point: 0x00008000
Hash algo: sha1
Hash value: 5461aee8d903053b7cc3c18b3d816f95b15abf73
Verifying Hash Integrity ... sha1+ OK
## Loading ramdisk from FIT Image at 10000000 ...
Using 'conf@1' configuration
Trying 'ramdisk@0' ramdisk subimage
Description: ramdisk
Type: RAMDisk Image
Compression: uncompressed
Data Start: 0x1038600c
Data Size: 50903520 Bytes = 48.5 MiB
Architecture: ARM
OS: Linux
Load Address: unavailable
Entry Point: unavailable
Hash algo: sha1
Hash value: 41b1346ef4fd794b710dffde39bcbc0f03e72138
Verifying Hash Integrity ... sha1+ OK
## Loading fdt from FIT Image at 10000000 ...
Using 'conf@1' configuration
Trying 'fdt@0' fdt subimage
Description: Flattened Device Tree blob
Type: Flat Device Tree
Compression: uncompressed
Data Start: 0x1037f688
Data Size: 26835 Bytes = 26.2 KiB
Architecture: ARM
Hash algo: sha1
Hash value: f34ac048eefe26b2361d064b0f8748883073c91d
Verifying Hash Integrity ... sha1+ OK
Booting using the fdt blob at 0x1037f688
Loading Kernel Image ... OK
Loading Ramdisk to 04f74000, end 07fff9e0 ... OK
Loading Device Tree to 04f6a000, end 04f738d2 ... OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0x0
Linux version 4.9.0-xilinx-v2017.4 (user@Ubuntu-VM) (gcc version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) ) #1 SMP PREEMPT Wed Jun 20 18:57:48 CDT 2018
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt:Machine model: Zynq Zybo Z7 Development Board
bootconsole [earlycon0] enabled
cma: Reserved 128 MiB at 0x38000000
Memory policy: Data cache writealloc
percpu: Embedded 14 pages/cpu @ef7cb000 s25932 r8192 d23220 u57344
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260608
Kernel command line: console=ttyPS0,115200 earlyprintk uio_pdrv_genirq.of_id=generic-uio
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 849340K/1048576K available (5120K kernel code, 198K rwdata, 1432K rodata, 1024K init, 341K bss, 68164K reserved, 131072K cma-reserved, 131072K highmem)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xf0800000 - 0xff800000 ( 240 MB)
lowmem : 0xc0000000 - 0xf0000000 ( 768 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
.text : 0xc0008000 - 0xc0600000 (6112 kB)
.init : 0xc0800000 - 0xc0900000 (1024 kB)
.data : 0xc0900000 - 0xc0931840 ( 199 kB)
.bss : 0xc0931840 - 0xc0986c58 ( 342 kB)
Preemptible hierarchical RCU implementation.
Build-time adjustment of leaf fanout to 32.
RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2
NR_IRQS:16 nr_irqs:16 16
efuse mapped to f0802000
slcr mapped to f0804000
L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
zynq_clock_init: clkc starts at f0804100
Zynq clock init
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns
Switching to timer-based delay loop, resolution 3ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns
timer #0 at f080c000, irq=17
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. 666.66 BogoMIPS (lpj=3333333)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x100058
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
SMP: Total of 2 processors activated (1333.33 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor menu
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xf0880000
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
Question
fandrei
I'm following the instructions from the readme file of the project, and PetaLinux build finished successfully (or at least it doesn't show any errors or warnings). The project is checked out as is, without any modifications.
However, trying to boot the board using the generated files results in the boot process hanging infinitely (see the log below). Any ideas what could go wrong?
0 Device: sdhci@e0100000 Manufacturer ID: 1b OEM: 534d Name: GD4QT Tran Speed: 50000000 Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 119.3 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes reading image.ub 54599132 bytes read in 4545 ms (11.5 MiB/s) ## Loading kernel from FIT Image at 10000000 ... Using 'conf@1' configuration Verifying Hash Integrity ... OK Trying 'kernel@0' kernel subimage Description: Linux Kernel Type: Kernel Image Compression: uncompressed Data Start: 0x100000d4 Data Size: 3667136 Bytes = 3.5 MiB Architecture: ARM OS: Linux Load Address: 0x00008000 Entry Point: 0x00008000 Hash algo: sha1 Hash value: 5461aee8d903053b7cc3c18b3d816f95b15abf73 Verifying Hash Integrity ... sha1+ OK ## Loading ramdisk from FIT Image at 10000000 ... Using 'conf@1' configuration Trying 'ramdisk@0' ramdisk subimage Description: ramdisk Type: RAMDisk Image Compression: uncompressed Data Start: 0x1038600c Data Size: 50903520 Bytes = 48.5 MiB Architecture: ARM OS: Linux Load Address: unavailable Entry Point: unavailable Hash algo: sha1 Hash value: 41b1346ef4fd794b710dffde39bcbc0f03e72138 Verifying Hash Integrity ... sha1+ OK ## Loading fdt from FIT Image at 10000000 ... Using 'conf@1' configuration Trying 'fdt@0' fdt subimage Description: Flattened Device Tree blob Type: Flat Device Tree Compression: uncompressed Data Start: 0x1037f688 Data Size: 26835 Bytes = 26.2 KiB Architecture: ARM Hash algo: sha1 Hash value: f34ac048eefe26b2361d064b0f8748883073c91d Verifying Hash Integrity ... sha1+ OK Booting using the fdt blob at 0x1037f688 Loading Kernel Image ... OK Loading Ramdisk to 04f74000, end 07fff9e0 ... OK Loading Device Tree to 04f6a000, end 04f738d2 ... OK Starting kernel ... Uncompressing Linux... done, booting the kernel. Booting Linux on physical CPU 0x0 Linux version 4.9.0-xilinx-v2017.4 (user@Ubuntu-VM) (gcc version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) ) #1 SMP PREEMPT Wed Jun 20 18:57:48 CDT 2018 CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache OF: fdt:Machine model: Zynq Zybo Z7 Development Board bootconsole [earlycon0] enabled cma: Reserved 128 MiB at 0x38000000 Memory policy: Data cache writealloc percpu: Embedded 14 pages/cpu @ef7cb000 s25932 r8192 d23220 u57344 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260608 Kernel command line: console=ttyPS0,115200 earlyprintk uio_pdrv_genirq.of_id=generic-uio PID hash table entries: 4096 (order: 2, 16384 bytes) Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) Memory: 849340K/1048576K available (5120K kernel code, 198K rwdata, 1432K rodata, 1024K init, 341K bss, 68164K reserved, 131072K cma-reserved, 131072K highmem) Virtual kernel memory layout: vector : 0xffff0000 - 0xffff1000 ( 4 kB) fixmap : 0xffc00000 - 0xfff00000 (3072 kB) vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) modules : 0xbf000000 - 0xbfe00000 ( 14 MB) .text : 0xc0008000 - 0xc0600000 (6112 kB) .init : 0xc0800000 - 0xc0900000 (1024 kB) .data : 0xc0900000 - 0xc0931840 ( 199 kB) .bss : 0xc0931840 - 0xc0986c58 ( 342 kB) Preemptible hierarchical RCU implementation. Build-time adjustment of leaf fanout to 32. RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2 NR_IRQS:16 nr_irqs:16 16 efuse mapped to f0802000 slcr mapped to f0804000 L2C: platform modifies aux control register: 0x72360000 -> 0x72760000 L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000 L2C-310 erratum 769419 enabled L2C-310 enabling early BRESP for Cortex-A9 L2C-310 full line of zeros enabled for Cortex-A9 L2C-310 ID prefetch enabled, offset 1 lines L2C-310 dynamic clock gating enabled, standby mode enabled L2C-310 cache controller enabled, 8 ways, 512 kB L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001 zynq_clock_init: clkc starts at f0804100 Zynq clock init sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns Switching to timer-based delay loop, resolution 3ns clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns timer #0 at f080c000, irq=17 Console: colour dummy device 80x30 Calibrating delay loop (skipped), value calculated using timer frequency.. 666.66 BogoMIPS (lpj=3333333) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) CPU: Testing write buffer coherency: ok CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 Setting up static identity map for 0x100000 - 0x100058 CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 Brought up 2 CPUs SMP: Total of 2 processors activated (1333.33 BogoMIPS). CPU: All CPU(s) started in SVC mode. devtmpfs: initialized VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4 clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns pinctrl core: initialized pinctrl subsystem NET: Registered protocol family 16 DMA: preallocated 256 KiB pool for atomic coherent allocations cpuidle: using governor menu hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers. hw-breakpoint: maximum watchpoint size is 4 bytes. zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xf0880000 zynq-pinctrl 700.pinctrl: zynq pinctrl initializedLink to comment
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