Median filter verilog

[ksaver25]

Hi i need some help with median filter on Verilog for  PMOD ALS sensor, to smooth the received data.

[D@n]

Sounds like a lot of fun!  Feel free to draft something and try it!  Don't touch the FPGA at first--try it in something like Verilator, iverilog, or even ghdl--it's faster than Vivado, and you only need a little bit of work with it.  (My favorite approach is Verilator ...)

If you want some filtering examples, feel free to browse zipcpu/dsp.  In particular, you'll find a test bench article that discusses a generic filtering interface you might find useful to get you started in your quest.

For bonus points, try formally verifying it.

All of this can be done without Vivado and without any hardware.  Once you are successful, then come to Vivado with your working component and see if you can fit it into the rest of the design and device you are working with.

Good luck, and feel free to come back here with questions!

Dan