Nexys2 Onboard Memory controller

[yildizabdullah]

I need to use Nexys2 onboard RAM for a project. Since I am not familiar with VHDL, I redesigned the RAM interface in Verilog HDL by using the reference design (NexysOnBoardMemCtrl.vhd) in Nexys2 Onboard Memory controller reference design on Digilent Nexys2 website.

Problem Description:

 

I use asynchronous mode both for read and write operations. I can write to memory and can verify it with Adept software. However, there is a problem when reading from RAM: when I initiate a read data operation, I can read the data at the respective address when I initiate another read operation.

 

For example:

 

When RAM is utilized as follows:

 

Addr     Data

 

0x0      0x0000

0x1      0x0001

0x2      0x0002

0x3      0x0003

...        ...

 

When I try to access the data at address 0x2, I read 0x0001 instead of 0x0002 (if I requested the data at address 0x1 at the previous read operation). 

 

I also examined the datasheet of the RAM IC which was not helpful.

 

I attached my Verilog design along with the reference implementation in VHDL. Could anyone help me who previously worked on a similar problem?

Nexys2_RAM.v

NexysOnBoardMemCtrl.vhd

[Alex]

Have you tried to run the simulation?