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anshumantech

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Posts posted by anshumantech

  1. Page 10 which is kept blank, in Arty 7 board schematics, has USB port (J10) to USB controller patented design. The output pins from it appear at J8 JTAG port. Therefore how can we use external JTAG HS2/HS3 type module at J8 as its output will be shorting to similar pins from USB controller IC (FT2232H) connected to J10? or resistors like R145, R147 prevent them shorting each other.

  2. Thanks, for precise reply.

    Then question is what are you trying to hide on USB PORG UART page? Have they laid out HS1/HS3 circuit on that page? Is there any link setting to use either J8 port(HS1/HS3) or converter circuit on USB PROG UART page; something like 4 pole multiplexer? Typically FPGA has only one JTAG port.

  3. USB Prog USRT page is intentionally kept blank in circuit schematics provided by you for Arty A7-35T/100T board. Why?Is that something to do with you tying to protect some minor IP?

    In Arty A7 reference manual you have mentioned J8 and J10 as parts concerning programming/JTAG? Can we use HS1 or HS3 Modules for USB to JTAG programming?

    Will HS1 or HS3 JTAG modules enable Logic analyzer mode of web pack? 

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