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dpaul

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  1. Like
    dpaul got a reaction from JColvin in Pmod CAN Linux Driver   
    @Ahmer Raza
    That's how it is!
    The CAN has its Higher Layers (Drivers) + Data Link layer + Physical Layer (commonly called CAN Transceivers).
    https://digilent.com/reference/pmod/pmodcan/start
    What the Digilent Pmod CAN offers you is a layer of SPI over the CAN's Physical layer (its just converts the can_tx and can_rx signals to spi signals). The CAN IP core or the Data Link Layer sits itself on the FPGA. So every transaction after the DataLinkLayer needs to be converted to SPI data, moved through the Pmod pin connector and put to the Transceiver side.
  2. Like
    dpaul got a reaction from Ahmer Raza in Pmod CAN Linux Driver   
    @Ahmer Raza
    That's how it is!
    The CAN has its Higher Layers (Drivers) + Data Link layer + Physical Layer (commonly called CAN Transceivers).
    https://digilent.com/reference/pmod/pmodcan/start
    What the Digilent Pmod CAN offers you is a layer of SPI over the CAN's Physical layer (its just converts the can_tx and can_rx signals to spi signals). The CAN IP core or the Data Link Layer sits itself on the FPGA. So every transaction after the DataLinkLayer needs to be converted to SPI data, moved through the Pmod pin connector and put to the Transceiver side.
  3. Like
    dpaul got a reaction from thomas1998 in Any device that can be used as a SPI master at 100 MHz in 1.8V logic?   
    Yes that's what I meant, after the FPGA loads the bitstream and the design is running, the GPIO pin voltages are fixed to either 1.8V or 3.3V  as long as the bitstream is running and the board is not powered off.
    I think that is what the OP @thomas1998 wants to do!
  4. Like
    dpaul got a reaction from thomas1998 in Any device that can be used as a SPI master at 100 MHz in 1.8V logic?   
    Really?
    For Digilent boards, is it not possible to choose the FPGA GPIO pins to either 1.8V or 3.3V operation as per the designer's wish (using Vivado GUI or TCL)?
    Please enlighten me.
  5. Like
    dpaul got a reaction from thomas1998 in Any device that can be used as a SPI master at 100 MHz in 1.8V logic?   
    @thomas1998
    As far as I know, you can set multiple FPGA GPIO pins to 1.8V or 3.3V.
    You can use the Vivado GUI or use TCL commands to specify the pin constraints.
    So in principle you can choose any FPGA, implement SPI Master on the FPGA, set the SPI ports to GPIO 1.8V and connect it with a SPI Slave.
  6. Like
    dpaul got a reaction from rachot in Can I use Pmod CAN V with AMD KR260 Dev kit with Pmod1 in a board   
    @rachot
    Pmoad interface is just a hardware level physical connection between AMD KR260 dev board and your Pmod CAN board. Of course you can connect it. Vivado software version has nothing to do with it. After the physical connection is done, what is important is, your FPGA logic should be able to correctly drive those Pmod signals.
    Any Pmod extension board can be connected to your AMD KR260 dev board's Pmod interface.
  7. Like
    dpaul got a reaction from Michael Bradley in is it okay to connect Zybo z7 PMod ports to digital signals through wires?   
    @Michael Bradley
    I have not taken a look for a long time into the Zybo Z7 pin mapping file. But I can tell you from memory that the PMOD connections are generally connected to the FPGA GPIO pins, so that you can control them as as you like.
    So the answer to your question would be a yes!
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