Muhammad Ahmad

Hi @artvvb actually i don't have too much experience in that. Basically i am trying to get data which is in the form of signals(clock) and i want to print them using python. when i program my FPGA and check terminal output at port in MobaXterm it is showing me results like 101010101010001110010 but instead of using terminal i want to use jupiter notebook and and print that data in the form of signals(clock).

Hello everyone, I am trying to take data from zedboard zynq 7000. what i am doing is that i create a block design which can generate a 20MHz clock frequency at 1st pin of PmodA. after that i give this clock to PCB and PCB gives me 3 different results which i give to PmodB pins. my board and PC is connected through a USB-UART cable. Now when i check my data is coming or not through a terminal like MobaXterm i connected it with communication port and se i am recieving data like 0101010101 because its a clock signal. Now my Question is that Instead of checking data on terminal i want to plot this data using jupiter Notebook.but i am unable to plot this data using python. Can anybody help me with code? I am attaching my python code as well as block design. Thanks In advance import serial code.txt

Dear, I already generated a clock frequency of 20MHz using clocking wizard. Now my question is different i am giving 3 inputs to Zedboard PmodB pins which i take from PCB and i have to show these pins result to screen.

Hi Everyone, I am trying to generate a clock frequency of 20MHz from Zedboard PmodA pins. and then i give this to PCB and get 3 output which i want to give to PMODB pins. after that i want to check this results in vivado can anybody help me how to do this in vivado 2018.2 or guide me with the help of some videos.

@dpaul I didn't understand about your solution. which clock i have to send and where? basically when i am using clocking wizard then we setup it input to 100MHz and output to 20Mhz.

Hi everyone, i am trying to make a project in which i am using zedboard and vivado 2018.2. i am trying to make a project in which we can generate a clock frequency of 20MHz from pmodA and then this is given to PCB board and the PCB returns 3 outputs which is given to PmodB and i want to show their result. Can anybody help m regarding this. i am facing an error. [DRC REQP-1712] Input clock driver: Unsupported PLLE2_ADV connectivity. The signal design_1_inst/design_1_i/clk_wiz_0/inst/clk_in1 on the design_1_inst/design_1_i/clk_wiz_0/inst/plle2_adv_inst/CLKIN1 pin of design_1_inst/design_1_i/clk_wiz_0/inst/plle2_adv_inst with COMPENSATION mode ZHOLD must be driven by a clock capable IO. i am attaching block design diagram Screen Recording 2024-07-04 190102.mp4