In the specifications for the CTR04, the 'Timebase' is listed as 96MHz.
Am I correct in assuming that this is the basic sampling freuquency, i.e. the frequency that the fpga samples the raw input signal coming in on an input channel with?
I assume this based on the fact that the specified 'Maximum input frequency', i.e. what I assume is the max frequency of the raw signal wired into a Ci port, is listed as 48MHz, i.e. the frequency one would get based on the Nyquist '1/2' criteria - 96/2 = 48.
Likewise, is the 'Counter read pacer' basically the polling rate, i.e. the 'rate' input to the ULx Timing (Sample Clock) LabVIEW vi?
So for example if this polling rate is 2Hz (e.g. twice a second), the count returned by each call of the ULx Read... LabVIEW vi would be the number of raw signal pulses that occured inbetween last two polling instances (assuming the 'clear after read' was set to True)?