kr.mk1
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Posts posted by kr.mk1
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On 7/27/2023 at 10:20 PM, JColvin said:
Hi @kr.mk1,
I'm not certain what platform you are using or what about your Quad SPI Protocol you are wanting to test (its general robustness? If it can communicate with some sort of external hardware successfully as a "real life test"? Something else?), but if you do not have direct access to using on-board flash as the test option, an external flash module that readily supports Quad SPI, like the Pmod Flash that D@n mentioned, https://digilent.com/reference/pmod/pmodsf3/start, (or whatever flash module, doesn't have to be Digilent made), would be one type of hardware to easily test your designed protocol on.
Thanks,
JColvinOn 7/27/2023 at 10:20 PM, JColvin said:If it can communicate with some sort of external hardware successfully as a "real life test"? ,
Hi @JColvin thanks
I am Using the https://www.xilinx.com/products/boards-and-kits/zcu104.html FPGA Board ,i just want to validate the design with some real hardware
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Thanks @D@n , I am using ZYNQ UltraScale+ , Can u tell me how can i access the Qspi Falsh via EMIO or MIO with all 4 io line, sclk and cs.
when i am enabling the qspi flash and spi IO i am only able to pin out the standard spi interface pin like , sclk, miso, mosi and cs.
thanks and regards
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I write RTL (Verilog )code for Quad SPI Protocol, on simulation its working . Can Anyone please suggest me the suitable hardware for the validation.
How to access QSPI flash control lines from PS-side of the Zynq found on ZCU104 board, if it is possible ?
in FPGA
Posted
Hello there ,
I am trying to validate my own written Qspi RTL design. how can i access the Zynq Qspi flash to read write by my own design
Thanks